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HT66F4530 数据表(PDF) 12 Page - Holtek Semiconductor Inc |
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HT66F4530 数据表(HTML) 12 Page - Holtek Semiconductor Inc |
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12 / 224 page  Rev. 1.00 1� De�e��e� �1� �01� Rev. 1.00 13 De�e��e� �1� �01� HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers Pin Name Function OPT I/T O/T Description PA�/AN0/A1O PA� PAPU PAWU PAS1 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high and wake-up. AN0 PAS1 AN — A/D Conve�te� input �hannel 0 A1O PAS1 — AN Operational Amplifier 1 output PA7/STP0/AN�/ A1NI PA7 PAPU PAWU PAS1 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high and wake-up. STP0 PAS1 — CMOS STM0 output AN� PAS1 AN — A/D Conve�te� input �hannel � A1NI PAS1 AN — Operational Amplifier 1 inverting input pin PB0/INT0/PTP0/ AN3/XT1 PB0 PBPU PBS0 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. INT0 PBS0 IFS ST — Exte�nal Inte��upt 0 PTP0 PBS0 — CMOS PTM0 output AN3 PBS0 AN — A/D Conve�te� input �hannel 3 XT1 PBS0 LXT — LXT pin PB1/INT1/AN4/XT� PB1 PBPU PBS0 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. INT1 PBS0 ST — Exte�nal Inte��upt 1 AN4 PBS0 AN — A/D Conve�te� input �hannel 4 XT� PBS0 — LXT LXT pin PB3/AN1/A1PI PB3 PBPU PBS0 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. AN1 PBS0 AN — A/D Conve�te� input �hannel 1 A1PI PBS0 AN — Operational Amplifier 1 non-inverting input pin PB4/CLO/A0O PB4 PBPU PBS1 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. CLO PBS1 — CMOS Syste� �lo�k output A0O PBS1 — AN Operational Amplifier 0 output PC0/SCS/OSC1 PC0 PCPU PCS0 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. SCS PCS0 IFS ST CMOS SPI slave sele�t pin OSC1 PCS0 HXT — HXT pin PC1/SDO/OSC� PC1 PCPU PCS0 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. SDO PCS0 — CMOS SPI se�ial data output OSC� PCS0 — HXT HXT pin PC�/RES/PTCK0/ SCK/SCL PC� PCPU PCS0 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. RES PCS0 ST — Exte�nal �eset input PTCK0 PCS0 ST — PTM0 �lo�k input SCK PCS0 IFS ST CMOS SPI se�ial �lo�k SCL PCS0 IFS ST NMOS I�C �lo�k line PC4/C1NI PC4 PCPU PCS1 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high. C1NI PCS1 AN — Co�pa�ato� 1 inve�ting input pin |
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