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R5F100GD 数据表(PDF) 90 Page - Renesas Technology Corp

部件名 R5F100GD
功能描述  True Low Power Platform
PDF  202 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F100GD 数据表(HTML) 90 Page - Renesas Technology Corp

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RL78/G13
2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85
C)
Page 90 of 196
R01DS0131EJ0330 Rev.3.30
Mar 31, 2016
Simplified I
2C mode mode connection diagram (during communication at same potential)
RL78 microcontroller
SDAr
SCLr
SDA
SCL
User device
VDD
Rb
Simplified I
2C mode serial transfer timing (during communication at same potential)
SDAr
tLOW
tHIGH
tHD:DAT
SCLr
tSU:DAT
1/fSCL
Remarks 1. Rb[
]:Communication line (SDAr) pull-up resistance, Cb[F]: Communication line (SDAr, SCLr) load
capacitance
2. r: IIC number (r = 00, 01, 10, 11, 20, 21, 30, 31), g: PIM number (g = 0, 1, 4, 5, 8, 14),
h: POM number (g = 0, 1, 4, 5, 7 to 9, 14)
3.
fMCK: Serial array unit operation clock frequency
(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number (m
= 0, 1),
n: Channel number (n = 0 to 3), mn = 00 to 03, 10 to 13)



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