R5F100GD datasheet(30/202 Pages) RENESAS

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RL78/G13

1. OUTLINE

Page 30 of 196

R01DS0131EJ0330 Rev.3.30

Mar 31, 2016

1.3.13 100-pin products

 100-pin plastic LQFP (14 × 14 mm, 0.5 mm pitch)

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

P156/ANI14

P155/ANI13

P154/ANI12

P153/ANI11

P152/ANI10

P151/ANI9

P150/ANI8

P27/ANI7

P26/ANI6

P25/ANI5

P24/ANI4

P23/ANI3

P22/ANI2

P21/ANI1/AVREFM

P20/ANI0/AVREFP

P130

P102/TI06/TO06

P04/SCK10/SCL10

P03/ANI16/SI10/RxD1/SDA10

P02/ANI17/SO10/TxD1

P01/TO00

P00/TI00

P145/TI07/TO07

P144/SO30/TxD3

P143/SI30/RxD3/SDA30

P86/(INTP8)

P85/(INTP7)

P84/(INTP6)

P83

P82/(SO10)/(TXD1)

P81/(SI10)/(RXD1)/(SDA10)

P80/(SCK10)/(SCL10)

EVSS1

P05

P06

P70/KR0/SCK21/SCL21

P71/KR1/SI21/SDA21

P72/KR2/SO21

P73/KR3

P74/KR4/INTP8

P75/KR5/INTP9

P76/KR6/INTP10/(RXD2)

P77/KR7/INTP11/(TXD2)

P67/TI13/TO13

P66/TI12/TO12

P65/TI11/TO11

P64/TI10/TO10

P31/TI03/TO03/INTP4/(PCLBUZ0)

P63/SDAA1

P62/SCLA1

75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

RL78/G13

(Top View)

100

Cautions 1. Make EVSS0, EVSS1 pins the same potential as VSS pin.

2. Make VDD pin the potential that is higher than EVDD0, EVDD1 pins (EVDD0 = EVDD1).

3. Connect the REGC pin to Vss via a capacitor (0.47 to 1

F).

Remarks 1. For pin identification, see 1.4 Pin Identification.

2. When using the microcontroller for an application where the noise generated inside the

microcontroller must be reduced, it is recommended to supply separate powers to the VDD, EVDD0

and EVDD1 pins and connect the VSS, EVSS0 and EVSS1 pins to separate ground lines.

3. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O

redirection register (PIOR). Refer to Figure 4-8 Format of Peripheral I/O Redirection Register

(PIOR) in the RL78/G13 User’s Manual.

R5F100GD 数据表(PDF) 30 Page - Renesas Technology Corp

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