R5F100GD datasheet(112/202 Pages) RENESAS

112 / 202 page

RL78/G13

2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85

C)

Page 112 of 196

R01DS0131EJ0330 Rev.3.30

Mar 31, 2016

(3) I

2C fast mode plus

(TA =

40 to +85C, 1.6 V  EVDD0 = EVDD1  VDD  5.5 V, VSS = EVSS0 = EVSS1 = 0 V)

HS (high-speed

main) Mode

LS (low-speed

main) Mode

LV (low-voltage

main) Mode

Parameter

Symbol

Conditions

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

Unit

SCLA0 clock frequency

fSCL

Fast mode plus:

fCLK

 10 MHz

2.7 V

 EVDD0  5.5 V

1000



kHz

Setup time of restart

condition

tSU:STA

2.7 V

 EVDD0  5.5 V

0.26



s

Hold time

Note 1

tHD:STA

2.7 V

 EVDD0  5.5 V

0.26



s

Hold time when SCLA0 =

“L”

tLOW

2.7 V

 EVDD0  5.5 V

0.5



s

Hold time when SCLA0 =

“H”

tHIGH

2.7 V

 EVDD0  5.5 V

0.26



s

Data setup time

(reception)

tSU:DAT

2.7 V

 EVDD0  5.5 V



s

Data hold time

(transmission)

Note 2

tHD:DAT

2.7 V

 EVDD0  5.5 V

0.45



s

Setup time of stop

condition

tSU:STO

2.7 V

 EVDD0  5.5 V

0.26



s

Bus-free time

tBUF

2.7 V

 EVDD0  5.5 V

0.5



s

Notes 1.

The first clock pulse is generated after this period when the start/restart condition is detected.

The maximum value (MAX.) of tHD:DAT is during normal transfer and a wait state is inserted in the ACK

(acknowledge) timing.

Caution

The values in the above table are applied even when bit 2 (PIOR2) in the peripheral I/O redirection

values in the redirect destination.

Remark

The maximum value of Cb (communication line capacitance) and the value of Rb (communication line

pull-up resistor) at that time in each mode are as follows.

Fast mode plus: Cb = 120 pF, Rb = 1.1 k



IICA serial transfer timing

tLOW

tBUF

tHIGH

tHD:STA

Stop

condition

Start

condition

Restart

condition

Stop

condition

tSU:DAT

tSU:STA

tSU:STO

tHD:STA

tHD:DAT

SCLAn

SDAAn

Remark

n = 0, 1

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