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ADE9000 数据表(PDF) 72 Page - Analog Devices

部件名 ADE9000
功能描述  High Performance, Multiphase Energy Power Quality Monitoring IC
PDF  73 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE9000 数据表(HTML) 72 Page - Analog Devices

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Data Sheet
ADE9000
Rev. A | Page 71 of 72
Addr. Name
Bits
Bit Name
Settings Description
Reset
Access
[1:0]
TEMP_TIME
Select the number of temperature readings to
average.
0x0
R/W
0 1 sample. New temperature measurement every
1 ms.
1 256 samples. New temperature measurement
every 256 ms.
10 512 samples. New temperature measurement
every 512 ms.
11 1024 samples. New temperature measurement
every 1 sec.
0x4B7 TEMP_RSLT
[15:12] RESERVED
Reserved.
0x0
R
[11:0]
TEMP_RESULT
12-bit temperature sensor result.
0x0
R
0x4B9 PGA_GAIN
[15:14] RESERVED
Reserved.
0x0
R
[13:12] VC_GAIN
PGA gain for voltage Channel C ADC.
0x0
R/W
00 Gain = 1.
01 Gain = 2.
10 Gain = 4.
11 Gain = 4.
[11:10] VB_GAIN
PGA gain for Voltage Channel B ADC. See VC_GAIN. 0x0
R/W
[9:8]
VA_GAIN
PGA gain for Voltage Channel A ADC. See VC_GAIN. 0x0
R/W
[7:6]
IN_GAIN
PGA gain for neutral current channel ADC. See
VC_GAIN.
0x0
R/W
[5:4]
IC_GAIN
PGA gain for Current Channel C ADC. See VC_GAIN. 0x0
R/W
[3:2]
IB_GAIN
PGA gain for Voltage Channel B ADC. See VC_GAIN. 0x0
R/W
[1:0]
IA_GAIN
PGA gain for Current Channel A ADC. See VC_GAIN. 0x0
R/W
0x4BA CHNL_DIS
[15:7]
RESERVED
Reserved.
0x0
R
6
VC_DISADC
Set this bit to one to disable the ADC.
0x0
R/W
5
VB_DISADC
Set this bit to one to disable the ADC.
0x0
R/W
4
VA_DISADC
Set this bit to one to disable the ADC.
0x0
R/W
3
IN_DISADC
Set this bit to one to disable the ADC.
0x0
R/W
2
IC_DISADC
Set this bit to one to disable the ADC.
0x0
R/W
1
IB_DISADC
Set this bit to one to disable the ADC.
0x0
R/W
0
IA_DISADC
Set this bit to one to disable the ADC.
0x0
R/W
0x4E0 VAR_DIS
[15:1]
RESERVED
Reserved.
0x0
R
0
VARDIS
Set this bit to disable the total VAR calculation.
This bit must be set before writing the run bit for
proper operation.
0x0
R/W



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