ADE9000 datasheet(33/73 Pages) AD

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ADE9000

Data Sheet

Rev. A | Page 32 of 72

Line Period Calculation

The ADE9000 calculates the line period for the Phase A, Phase B,

and Phase C voltages, and the combined voltage signal, and the

results are available in the APERIOD, BPERIOD, CPERIOD,

and COM_PERIOD registers, respectively.

Calculate the line period, tL, from the xPERIOD register,

according to the following equation:

(sec)

8000

= xPERIOD

If the calculated period value is outside the range of 40 Hz to

70 Hz, or if zero crossings for that phase are not detected, the

xPERIOD register is coerced to correspond to 50 Hz or 60 Hz,

depending on SELFREQ bit in the ACCMODE register.

LP_SEL

COM_PERIOD

CPERIOD

BPERIOD

APERIOD

RESAMPLING

USER_PERIOD

UPERIOD_SEL

WAVEFORM

BUFFER

SINC4 OUTPUT

SINC4 + IIR LPF OUPUT

xI_PCF, xV_PCF

FAST RMS½

10 CYCLE RMS/

12 CYCLE RMS

WF_CAP_SEL

WF_SRC

Figure 69. Line Period Selection for Resampling

Angle Measurement

The ADE9000 provides nine angle measurements. ANGL_IA_IB,

ANGL_IB_IC, and ANGL_IA_IC provide phase angle between

currents. ANGL_VA_VB, ANGL_VB_VC, and ANGL_VA_VC

provide phase angle between voltages. ANGL_VA_IA,

ANGL_VB_IB, and ANGL_VC_IC provide phase angle between

voltage and currents. To convert angle register reading to degrees,

use the following equations.

For a 50 Hz system,

Angle (Degrees) = ANGL_x_y × 0.017578125

For a 60 Hz system,

Angle (Degrees) = ANGL_x_y × 0.02109375

Phase Sequence Error Detection

The ADE9000 monitors phase sequences and sets the SEQERR

bit in the STATUS1 register if a sequence error occurs or a phase

drops below ZXTHRSH. SEQ_CYC determines the number of

cycles to monitor to generate the sequence error. To generate an

interrupt on IRQ1, set the SEQERR bit in the MASK1 register.

Fast RMS½ Measurement

RMS½ is an rms measurement performed over one line cycle,

updated every half cycle. This measurement is provided for

voltage and current on all phases plus the neutral current. All

the half cycle rms measurements are performed over the same

time interval and update at the same time, as indicated by the

RMSONERDY bit in the STATUS0 register. The results are

stored in the AIRMSONE, BIRMSONE, CIRMSONE,

NIRMSONE, AVRMSONE, BVRMSONE, and CVRMSONE

registers. The xRMSONE register reading with full-scale inputs

is 52,702,092d.

It is recommended to select the data before the high-pass filter

for the fast rms measurement by setting the RMS_SRC_SEL bit

in the CONFIG0 register.

The LP_SEL bits in the ZX_LP_SEL register select which line

period measurement sets the number of samples used in the

rms½ measurement. Alternatively, set the UPERIOD_SEL bit in

the CONFIG2 register to set desired period in the USER_PERIOD

signal levels, xRMSONEOS.

The signal chain is shown in Figure 70.

COM_PERIOD

CPERIOD

BPERIOD

APERIOD

USER_PERIOD

UPERIOD_SEL

WAVEFORM

BUFFER

xI_PCF

xIRMSONEOS

xIRMS1012OS

SELFREQ

HPF

PHASE

COMP

INTEGRATOR

HPFDIS

INTEN

RMS_SRC_SEL

CURRENT

CHANNEL

SAMPLES

xIRMSONE

xIRMS1012

RESAMPLING

FAST RMS½

10 CYCLE RMS/

12 CYCLE RMS

Figure 70. RMS½, 10 Cycle RMS, and 12 Cycle RMS Measurements

10 Cycle RMS/12 Cycle RMS

The 10 cycle rms/12 cycle rms measurement is performed over

10 cycles on a 50 Hz network or 12 cycles on a 60 Hz network.

ADE9000 数据表(PDF) 33 Page - Analog Devices

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