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ADAV803ASTZ 数据表(PDF) 59 Page - Analog Devices |
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ADAV803ASTZ 数据表(HTML) 59 Page - Analog Devices |
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59 / 61 page ![]() ADAV803 Rev. A | Page 58 of 60 ALC Control Register 2— Address = 1111100 (0x7C) Table 142. ALC Control Register 2 Bit Map 7 6 5 4 3 2 1 0 Reserved RECTH1 RECTH0 ATKTH1 ATKTH0 RECTIME1 RECTIME0 ATKTIME Table 143. ALC Control Register 2 Bit Descriptions Bit Name Description RECTH[1:0] Recovery threshold. 00 = −2 dB. 01 = −3 dB. 10 = −4 dB. 11 = −6 dB. ATKTH[1:0] Attack threshold. 00 = 0 dB. 01 = −1 dB. 10 = −2 dB. 11 = −4 dB. RECTIME[1:0] Recovery time selection. 00 = 32 ms. 01 = 64 ms. 10 = 128 ms. 11 = 256 ms. ATKTIME Attack timer selection. 0 = 1 ms. 1 = 4 ms. ALC Control Register 3—Address 1111101 (0x7D) Table 144. ALC Control Register 3 Bit Map 7 6 5 4 3 2 1 0 ALC RESET ALC RESET ALC RESET ALC RESET ALC RESET ALC RESET ALC RESET ALC RESET Table 145. ALC Control Register 3 Bit Description Bit Name Description ALC RESET A write to this register restarts the ALC operation. The value written to this register is irrelevant. A read from this register gives the gain reduction factor. |
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