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Data Sheet

AD7653

Rev. C | Page 17 of 26

TYPICAL CONNECTION DIAGRAM

Figure 22 shows a typical connection diagram for the AD7653.

Analog Input

Figure 23 shows an equivalent circuit of the input structure of

the AD7653.

The two diodes, D1 and D2, provide ESD protection for the

analog inputs IN and INGND. Care must be taken to ensure

that the analog input signal never exceeds the supply rails by

more than 0.3 V. This will cause these diodes to become

forward-biased and start conducting current. These diodes can

handle a forward-biased current of 100 mA maximum. For

instance, these conditions could eventually occur when the

input buffer’s (U1) supplies are different from AVDD. In such a

case, an input buffer with a short-circuit current limitation can

be used to protect the part.

OR INGND

AGND

AVDD

02966-0-008

Figure 23. Equivalent Analog Input Circuit

This analog input structure allows the sampling of the different-

tial signal between IN and INGND. Unlike other converters,

INGND is sampled at the same time as IN. By using this differ-

ential input, small signals common to both inputs are rejected.

For instance, by using INGND to sense a remote signal ground,

ground potential differences between the sensor and the local

ADC ground are eliminated.

During the acquisition phase, the impedance of the analog

input IN can be modeled as a parallel combination of capacitor

C1 and the network formed by the series connection of R1 and

C2. C1 is primarily the pin capacitance. R1 is typically 168 Ω

and is a lumped component made up of some serial resistors

and the on resistance of the switches. C2 is typically 60 pF and

is mainly the ADC sampling capacitor.

During the conversion phase, when the switches are opened, the

input impedance is limited to C1. R1 and C2 make a 1-pole

low-pass filter that reduces undesirable aliasing effects and

limits the noise.

When the source impedance of the driving circuit is low, the

AD7653 can be driven directly. Large source impedances will

significantly affect the ac performance, especially total

harmonic distortion.

Driver Amplifier Choice

Although the AD7653 is easy to drive, the driver amplifier

needs to meet the following requirements:

•

The driver amplifier and the AD7653 analog input circuit

must be able to settle for a full-scale step of the capacitor

array at a 16-bit level (0.0015%). In the amplifier’s data

sheet, settling at 0.1% to 0.01% is more commonly

specified. This could differ significantly from the settling

time at a 16-bit level and should be verified prior to driver

selection. The tiny op amp AD8021, which combines

ultralow noise and high gain-bandwidth, meets this settling

time requirement even when used with gains up to 13.

•

The noise generated by the driver amplifier needs to be

kept as low as possible in order to preserve the SNR and

transition noise performance of the AD7653. The noise

coming from the driver is filtered by the AD7653 analog

input circuit 1-pole low-pass filter made by R1 and C2 or

by the external filter, if one is used.

•

The driver needs to have a THD performance suitable to

that of the AD7653.

The AD8021 meets these requirements and is appropriate for

almost all applications. The AD8021 needs a 10 pF external

compensation capacitor that should have good linearity as an

NPO ceramic or mica type.

The AD8022 could also be used if a dual version is needed and

gain of 1 is present. The AD829 is an alternative in applications

where high frequency (above 100 kHz) performance is not

required. In gain of 1 applications, it requires an 82 pF

compensation capacitor. The AD8610 is an option when low

bias current is needed in low frequency applications.

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