AD7653ACPZ datasheet(25/27 Pages) AD

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AD7653

Data Sheet

Rev. C | Page 24 of 26

MICROPROCESSOR INTERFACING

The AD7653 is ideally suited for traditional dc measurement

applications supporting a microprocessor, and for ac signal

processing applications interfacing to a digital signal processor.

The AD7653 is designed to interface either with a parallel 8-bit

or 16-bit wide interface, or with a general-purpose serial port or

I/O ports on a microcontroller. A variety of external buffers can

be used with the AD7653 to prevent digital noise from coupling

into the ADC. The following section discusses the use of an

AD7653 with an SPI equipped DSP, the ADSP-2191M.

SPI Interface (ADSP-2191M)

Figure 37 shows an interface diagram between the AD7653 and

the SPI equipped ADSP-2191M. To accommodate the slower

speed of the DSP, the AD7653 acts as a slave device and data

must be read after conversion. This mode also allows the daisy-

chain feature. The convert command can be initiated in

response to an internal timer interrupt. The reading process can

be initiated in response to the end-of-conversion signal (BUSY

going LOW) using an interrupt line of the DSP. The serial inter-

face (SPI) on the ADSP-2191M is configured for master

mode—(MSTR) = 1, Clock Polarity bit (CPOL) = 0, Clock

Phase bit (CPHA) = 1, and SPI Interrupt Enable (TIMOD) =

00—by writing to the SPI control register (SPICLTx). To meet

all timing requirements, the SPI clock should be limited to

17 Mbps, which allows it to read an ADC result in less than 1

µs. When a higher sampling rate is desired, use of one of the

parallel interface modes is recommended.

AD7653*

ADSP-2191M*

SER/PAR

PFx

MISOx

SCKx

PFx or TFSx

BUSY

SDOUT

SCLK

CNVST

EXT/INT

INVSCLK

DVDD

* ADDITIONAL PINS OMITTED FOR CLARITY

SPIxSEL (PFx)

02966-0-021

Figure 37. Interfacing the AD7653 to an SPI Interface

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