L9679P datasheet(45/272 Pages) STMICROELECTRONICS

45 / 272 page

DocID029275 Rev 1

45/272

L9679P

Start-up and power control

271

Figure 19. ER switch state diagram

6.7

SYNCBOOST boost regulator

The SYNCBOOST boost regulator also operates at 1.882 MHz allowing the user to select

smaller less expensive external components. The regulator provides a 12 V/14.75 V

nominal for the sync pulse feature used in PSI-5 bussed satellite sensor configuration. The

regulator also provides the power for the SATBUCK regulator.

The SyncBoost switching regulator uses a classical peak current mode control loop to

properly regulate the output voltage and includes an over-voltage protection that

immediately switch off the PowerMOS to protect the device. The regulator includes also a

soft start circuit which apply a ramp on the over current threshold from the 40% of

IOC_SYNCBST value to the maximum one with 16 steps and within TSOFTST_OC_SYNCBST. The

soft start is restarted every time the regulator is enabled, namely there is a transition from

the SYNCBOOST_OFF state to the SYNCBOOST_ON state.

In normal operation, the SYNCBOOST regulator operates directly from battery providing a

voltage level to operate the sync pulse driver circuit. Should the input voltage be greater

than regulation point, the output voltage will track the input voltage less any drops in the

external components.

The boost regulator is enabled automatically by the power control state machine, but can be

disabled on purpose via SPI command through the SYS_CTL(SYNCBST_EN) bit. The

regulation point is fixed at a nominal 12 V at startup. User may increase the output

regulation voltage to 14.75 V nominal by setting the SATV bit via a dedicated SPI command,

should an extended voltage range be needed.

Boost converter diagnostics include over voltage and under voltage, reported by the

S_BST_NOK bit in the POWER_STATE register, and the circuit is fully protected against

shorts. The integrated FET featuring the boost switch is protected against short to battery by

means of a thermal shutdown circuit. When thermal fault is detected the FET is switched off

and latched in this state until the related fault flag ERBST_OT in the FLTSR register is read.

L9679P 数据表(PDF) 45 Page - STMicroelectronics