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数据搜索系统，热门电子元器件搜索 |
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L9679P 数据表(PDF) 68 Page - STMicroelectronics |
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L9679P 数据表(HTML) 68 Page - STMicroelectronics |
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68 / 272 page  SPI interfaces L9679P 68/272 DocID029275 Rev 1 0 WD2TM=0 1 WD2TM=1 WD2_WDR 0 0 - WD2 reset latch - set when WD2RESET or STOPPING states are entered, cleared upon read 0 WD2RST signal = 0 1 WD2RST signal = 1 WD1_LO 11 - WD1 lockout - reflects WD1 lockout state Set and cleared per Watchdog Timer Flow Diagram 0 WD1 Lockout inactive 1 WD1 Lockout active WD1_TM 0 0 0 WD1 test mode - reflects WD1TM signal state Set and cleared per Watchdog Timer Flow Diagram 0 WD1TM=0 1 WD1TM=1 WD1_WDR 0 0 - WD1 reset latch Set and cleared per Watchdog Timer Flow Diagram 0 WD1_WDR signal = 0 1 WD1_WDR signal = 1 WSMRST 1 1 - Watchdog state machine reset Set when WSM reset goes to '1', cleared upon SPI read 0 WSM reset has not occurred 1 WSM reset has occurred SSMRST 1 1 1 Safing state machine reset Set when SSM reset goes to '1', cleared upon SPI read 0 SSM reset has not occurred 1 SSM Reset has occurred POR 1 - - Power on Reset Set when POR goes to '1', cleared upon SPI read 0 POR reset has not occurred 1 POR Reset has occurred |
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