L9679P datasheet(50/272 Pages) STMICROELECTRONICS

50 / 272 page

Start-up and power control

L9679P

50/272

DocID029275 Rev 1

Figure 25. Internal voltage monitors

An active low pin output (RESET pin) is driven from the L9679P to allow resetting of external

devices such as the microcontroller, sensors, and other ICs within the ECU.

Three internal reset signals are generated by the device:



POR

Power On Reset - This reset is asserted when a failure is detected in the internal

supplies or bandgap circuits. When active, all other resets are asserted.



WSM_RESET

Watchdog State Machine Reset - This reset is generated when the POR is active or

when a failure is detected in the VCC supply.



SSM_RESET

System State Machine Reset - This reset is asserted when the POR or the

WSM_RESET are active, or when a failure is detected in either Watchdog state

machine, or again when the MCUFAULTB pin is active.

The RESET pin is the active-low signal driven on the output pin, and is an inverted form of

SSM_RESET.

The cause of the RESET activation is latched and reported into the Fault Status Register

FLTSR and cleared upon SPI reading.

The reset logic shall be controlled as shown in the diagram below:

L9679P 数据表(PDF) 50 Page - STMicroelectronics