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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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L9679P 数据表(PDF) 245 Page - STMicroelectronics |
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L9679P 数据表(HTML) 245 Page - STMicroelectronics |
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245 / 272 page  DocID029275 Rev 1 245/272 L9679P Electrical characteristics 271 Figure 71. Deployment drivers diagram 31 LCSx Clock Spring Inductance Design Info 0 - 42.9 μH 32 kL_CS1 – L_CS2 Clock Spring Coupling Design Info 0.739 - 0.903 - 33 LEMI Squib EMI protection Design Info 0 - 7.7 μH 1. In case of an unsupplied device and shorted deployment pins (e.g. to battery voltage), the dynamic reverse current through the high side power stage depends on CSSxy. 2. LDEPL could be calculated in the following way: Non-Clock Spring Loops: LDEPL(max) = LWire(10m*2) + LEMI = (3.6uH/m * 10m) + 7.7uH =43.7uH Clock Spring Loops: LWire(3m*2) + 2*LCSx + LEMI - (2*kL_CX*SQRT(L_CS1*L_CS2)) = = (3.6uH/m * 3m) + 2 * 42.9uH + 7.7uH - (2 * 0.739 * 42.9uH) = 40.9uHClock Spring Loops with short to ground LDEPL(max) = LWire(3m) + LCSx + LEMI = (1.8uH/m * 3m) + 42.9uH + 7.7uH = 56uH. Table 55. Deployment drivers – DC specifications (continued) No Symbol Parameter Comments / Conditions Min Typ Max Unit |
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