EZ-PD™ CCG2 Datasheet

Document Number: 001-93912 Rev. *L

Page 18 of 33

Device Level Specifications

All specifications are valid for –40 °C

 TA  85 °C and TJ  100 °C, except where noted. Specifications are valid for 3.0 V to 5.5 V,

except where noted.

Table 2. DC Specifications

Spec ID

Parameter

Description

Min

Typ

Max

Units

Details/Conditions

SID.PWR#1

Power supply input voltage

2.7

–

5.5

V

UFP Applications

SID.PWR#1_A

Power supply input voltage

3.0

–

5.5

V

DFP/DRP Applications

SID.PWR#23

Power supply input voltage

4.0

–

5.5

V

–

Power supply input voltage

4.0

–

5.5

V

–

SID.PWR#13

GPIO power supply

1.71

–

5.5

V

–

SID.PWR#24

Output voltage (for core logic)

–

1.8

–

V

–

SID.PWR#15

External regulator voltage bypass on

11.3

1.6

µF

X5R ceramic or better

SID.PWR#16

Power supply decoupling capacitor

–1

–

µF

X5R ceramic or better

SID.PWR#25

Power Supply Decoupling Capacitor

–0.1

–

µF

X5R ceramic or better

SID.PWR#12

Supply current

–

7.5

–

mA

CC I/O IN Transmit or

no I/O sourcing current, CPU

at 12 MHz

SID25A

48 MHz

–2.0

3.0

mA

blocks except CPU are ON,

CC I/O ON, no I/O sourcing

current

SID_DS_RA

disabled

–

100

–

µA

SID.PD.7.

VCONN leaker circuits

turned off during deep sleep

SID34

WDT ON

–50

–

µA

SID_DS

–

2.5

–

µA

Type-C not attached, CC

disabled

XRES Current

SID307

Supply current while XRES asserted

–

1

10

µA–