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CCG2 数据表(PDF) 19 Page - Cypress Semiconductor

部件名 CCG2
功能描述  USB Type-C Port Controller
PDF  33 Pages
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制造商  CYPRESS [Cypress Semiconductor]
网页  http://www.cypress.com
标志 CYPRESS - Cypress Semiconductor

CCG2 数据表(HTML) 19 Page - Cypress Semiconductor

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EZ-PD™ CCG2 Datasheet
Document Number: 001-93912 Rev. *L
Page 19 of 33
I/O
Table 3. AC Specifications
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID.CLK#4
FCPU
CPU frequency
DC
–
48
MHz
3.0 V
VDDD 5.5 V
SID.PWR#20
TSLEEP
Wakeup from sleep mode
–
0
–
µs
Guaranteed by
characterization
SID.PWR#21
TDEEPSLEEP Wakeup from Deep Sleep mode
–
–
35
µs
24-MHz IMO.
Guaranteed by charac-
terization
SID.XRES#5
TXRES
External reset pulse width
5
–
–
µs
Guaranteed by
characterization
SYS.FES#1
T_PWR_RDY
Power-up to “Ready to accept I2C /
CC command”
–
5
25
ms
Guaranteed by
characterization
Table 4. I/O DC Specifications
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/Conditions
SID.GIO#37
VIH[2]
Input voltage HIGH threshold
0.7 × VDDIO
––
V
CMOS input
SID.GIO#38
VIL
Input voltage LOW threshold
–
–
0.3 × VDDIO
VCMOS input
SID.GIO#39
VIH[2]
LVTTL input, VDDIO < 2.7 V
0.7× VDDIO
––
V
–
SID.GIO#40
VIL
LVTTL input, VDDIO < 2.7 V
–
–
0.3 × VDDIO
V–
SID.GIO#41
VIH[2]
LVTTL input, VDDIO  2.7 V
2.0
–
–
V
–
SID.GIO#42
VIL
LVTTL input, VDDIO  2.7 V
–
–
0.8
V
–
SID.GIO#33
VOH
Output voltage HIGH level
VDDIO – 0.6
–
–
V
IOH = 4 mA at 3-V
VDDIO
SID.GIO#34
VOH
Output voltage HIGH level
VDDIO – 0.5
–
–
V
IOH = 1 mA at 1.8-V
VDDIO
SID.GIO#35
VOL
Output voltage LOW level
–
–
0.6
V
IOL = 4 mA at 1.8-V
VDDIO
SID.GIO#36
VOL
Output voltage LOW level
–
–
0.6
V
IOL = 8mA at 3V VDDIO
SID.GIO#5
RPULLUP
Pull-up resistor
3.5
5.6
8.5
kΩ
–
SID.GIO#6
RPULLDOWN
Pull-down resistor
3.5
5.6
8.5
kΩ
–
SID.GIO#16
IIL
Input leakage current (absolute
value)
––
2
nA
25 °C, VDDIO = 3.0
V.Guaranteed by
characterization
SID.GIO#17
CIN
Input capacitance
–
–
7
pF
Guaranteed by
characterization
SID.GIO#43
VHYSTTL
Input hysteresis LVTTL
25
40
–
mV
VDDIO  2.7 V.
Guaranteed by
characterization.
SID.GPIO#44 VHYSCMOS
Input hysteresis CMOS
0.05 × VDDIO ––
mV Guaranteed by
characterization
SID69
IDIODE
Current through protection diode to
VDDIO/Vss
–
–
100
µA Guaranteed by
characterization
SID.GIO#45
ITOT_GPIO
Maximum total source or sink chip
current
–
–
200
mA Guaranteed by
characterization
Note
2. VIH must not exceed VDDIO + 0.2 V.



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