S29AS016J datasheet(39/59 Pages) CYPRESS

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Document Number: 002-01122 Rev.*L

Page 39 of 59

S29AS016J

Figure 12.2 Toggle Bit Algorithm

Notes

1. Read toggle bit twice to determine whether or not it is toggling. See text.

2. Recheck toggle bit because it may stop toggling as DQ5 changes to 1. See text.

12.6

DQ5: Exceeded Timing Limits

DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under these conditions DQ5

produces a 1. This is a failure condition that indicates the program or erase cycle was not successfully completed.

The DQ5 failure condition may appear if the system tries to program a 1 to a location that is previously programmed to 0. Only an

erase operation can change a 0 back to a 1. Under this condition, the device halts the operation, and when the operation has

exceeded the timing limits, DQ5 produces a 1.

Under both these conditions, the system must issue the reset command to return the device to reading array data.

12.7

DQ3: Sector Erase Timer

After writing a sector erase command sequence, the system may read DQ3 to determine whether or not an erase operation has

begun. (The sector erase timer does not apply to the chip erase command.) If additional sectors are selected for erasure, the entire

time-out also applies after each additional sector erase command. When the time-out is complete, DQ3 switches from 0 to 1. The

system may ignore DQ3 if the system can guarantee that the time between additional sector erase commands will always be less

than 50

s. See also Sector Erase Command Sequence on page 30.

START

Yes

DQ5 = 1?

Yes

Toggle Bit

= Toggle?

Program/Erase

Operation Not

Complete, Write

Reset Command

Program/Erase

Operation Complete

Read DQ7–DQ0

Toggle Bit

= Toggle?

Read DQ7–DQ0

Twice

Read DQ7–DQ0

(Note 1)

(Notes 1, 2)

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