AD8364ACPZ-R2 datasheet(8/44 Pages) AD

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AD8364

Data Sheet

Rev. C | Page 8 of 44

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VSTB

OUTB

FBKB

OUTN

OUTP

FBKA

OUTA

VSTA

VPSB

INHB

INLB

COMR

PWDN

INLA

INHA

VPSA

AD8364

TOP VIEW

(Not to Scale)

NOTES

1. THE EXPOSED PADDLE ON THE UNDERSIDE

OF THE PACKAGE SHOULD BE SOLDERED TO

A GROUND PLANE WITH LOW THERMAL AND

ELECTRICAL CHARACTERISTICS.

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

Equiv. Circuit

CHPB

Connect to common via a capacitor to determine 3 dB point of Channel B input signal high-pass

filter.

2, 23

DECB, DECA

Decoupling Terminals for INHA/INLA and INHB/INLB. Connect to common via a large capacitance

to complete input circuit.

Figure 52

3, 22, 29

COMB, COMA, COMR

Input System Common Connection. Connect via low impedance to system common.

4, 5

ADJB, ADJA

Temperature Compensation for Channel B and Channel A. An external voltage is connected to

these pins to improve temperature drift. This voltage can be derived from VREF, that is, connect a

resistor from VREF to ADJ[A, B] and another resistor from ADJ[A, B] to ground. The value of these

resistors change as the frequency changes.

Figure 68

VREF

General-Purpose Reference Voltage Output of 2.5 V.

Figure 54

VLVL

Reference Level Input for OUTP and OUTN. (Usually connected to VREF through a voltage divider

or left open).

Figure 58

8, 17

CLPB, CLPA

Channel B and Channel A Connection for Loop Filter Integration (Averaging) Capacitor. Connect a

ground-referenced capacitor to this pin. A resistor can be connected in series with this capacitor

to improve loop stability and response time.

VSTB

The voltage applied to this pin sets the decibel value of the required RF input voltage to Channel

B, which results in zero current flow in the loop integrating capacitor pin, CLPB.

Figure 56

OUTB

Channel B Output of Error Amplifier. In measurement mode, normally connected directly to VSTB.

Figure 57

FBKB

Feedback Through 1 kΩ

to the Negative Terminal of the Integrated Op Amp Driving OUTN.

OUTN

Channel Differencing Op Amp Output. In measurement mode, normally connected directly to FBKB

and follows the equation OUTN = OUTA − OUTB + VLVL.

Figure 58

OUTP

Channel Differencing Op Amp Output. In measurement mode, normally connected directly to FBKA

and follows the equation OUTP = OUTA − OUTB + VLVL.

Figure 58

FBKA

Feedback Through 1kΩ

to the Negative Terminal of the Integrated Op Amp Driving OUTP.

OUTA

Channel A Output of Error Amplifier. In measurement mode, normally connected directly to VSTA.

Figure 57

VSTA

The voltage applied to this pin sets the decibel value of the required RF input voltage to Channel

A that results in zero current flow in the loop integrating capacitor pin, CLPA.

Figure 56

18, 20

ACOM

Analog Common for Channels A and B. Connect via low impedance to common.

21, 25, 32

VPSR, VPSA, VPSB

Supply for the Input System of Channels A and B. Supply for the internal references. Connect to

+5 V power supply.

TEMP

Temperature Sensor Output.

Figure 53

CHPA

Connect to common via a capacitor to determine 3 dB point of Channel A input signal high-pass

filter.

26, 27

INHA, INLA

Channel A High and Low RF Signal Input Terminal.

Figure 52

PWDN

Disable/Enable Control Input. Apply logic high voltage to shut down the AD8364.

Figure 55

30, 31

INLB, INHB

Channel B Low and High RF Signal Input Terminal.

Figure 52

Under

Package

Exposed Paddle

The exposed paddle on the underside of the package must be soldered to a ground plane with

low thermal and electrical characteristics.

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