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AD8364ACPZ-R2 数据表(PDF) 24 Page - Analog Devices |
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AD8364ACPZ-R2 数据表(HTML) 24 Page - Analog Devices |
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24 / 44 page ![]() AD8364 Data Sheet Rev. C | Page 24 of 44 26 27 28 29 30 32 31 15 14 13 12 11 9 10 7 6 8 5 4 3 1 2 25 16 18 19 17 20 21 22 24 23 VPOS C20 100pF C21 0.1 µF C22 0.1 µF C1 0.1 µF C24 100pF C19 0.1 µF R201 R191 R171 C16 0.1 µF AD8364ACPZ C9 0.1 µF C9 0.1 µF C14 0.1 µF C23 100pF C8 0.1 µF C10 100pF C11 0.1 µF R5 0 Ω R24 0 Ω C12 100pF C13 0.1 µF VPOS VPOS VPSA CHPA CLPA ACOM TEMP ACOM VPSR COMA DECA CHPB CLPB VLVL VREF ADJA ADJB COMB DECB VPSB INHB INLB COMR PWDN INLA INHA VSTA VSTB OUTB FBKB OUTN OUTP FBKA OUTA OUTA OUTP OUTN OUTB R181 C5 0.1 µF INPA 1:4 C7 0.1 µF C6 0.1 µF T2 C2 0.1 µF INPB 1:4 C4 0.1 µF C3 0.1 µF T1 EXPOSED PADDLE 1SEE TEXT. Figure 60. Basic Connections for Operation in Measurement Mode CONTROLLER MODE BASIC CONNECTIONS In addition to being a measurement device, the AD8364 can also be configured to measure and control rms signal levels. The AD8364 has two controller modes. Each of the two rms log detectors can be separately configured to set and control the output power level of a variable gain amplifier (VGA) or variable voltage attenuator (VVA). Alternatively, the two rms log detectors can be configured to measure and control the gain of an amplifier or signal chain. Automatic Power Control Figure 61 shows how the device must be reconfigured to control output power. The RF input to the device is configured as before. A directional coupler taps off some of the power being generated by the VGA (typically a 10 dB to 20 dB coupler is used). A power splitter can be used instead of a directional coupler if there are no concerns about reflected energy from the next stage in the signal chain. Some additional attenuation may be required to set the maximum input signal at the AD8364 to be equal to the recommended maximum input level for optimum linearity and temperature stability at the frequency of operation. VSTA and OUTA are no longer shorted together. OUTA now provides a bias or gain control voltage to the VGA. The gain control sense of the VGA must be negative and monotonic, that is, increasing voltage tends to decrease gain. However, the gain control transfer function of the device does not need to be well controlled or particularly linear. If the gain control sense of the VGA is positive, an inverting operational amplifier circuit with a dc offset shift can be used between the AD8364 and the VGA to keep the gain control voltage in the 0 V to 5 V range. VSTA becomes the setpoint input to the system. This can be driven by a DAC, as shown in Figure 61, if the output power is expected to vary, or it can simply be driven by a stable reference voltage if constant output power is required. This DAC must have an output swing that covers the 0 V to 3.5 V range. |
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