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AD9577BCPZ-R7 数据表(PDF) 43 Page - Analog Devices

部件名 AD9577BCPZ-R7
功能描述  Clock Generator with Dual PLLs, Spread Spectrum, and Margining
PDF  44 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9577BCPZ-R7 数据表(HTML) 43 Page - Analog Devices

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Data Sheet
AD9577
Rev. A | Page 43 of 44
1
10
VSCA
VSI2C
REFOUT
VSREFOUT
VSX
REFCLK
XT2
XT1
REFSEL
VSCB
30
21
OUT3P
VSFB
VSM
SSCG
VSFA
OUT1N
OUT1P
VSOB1A
OUT3N
VSOB3B
AD9577
22pF
22pF
CD
CD
VS
VS
VS
VS
VS
VS
VS
VS
CD
CD
220nF
CD
CD
VS
VS
VS
VS
VS
DO NOT CONNECT OTHER TRACES
TO PIN 15, PIN 16, PIN 35, AND PIN 36.
CAPACITORS CD CONSIST OF
100nF IN PARALLEL WITH 10nF.
10kΩ
VS
10kΩ
VS
50Ω
50Ω
VS
127Ω
83Ω
127Ω
83Ω
VS
127Ω
83Ω
127Ω
83Ω
VS
127Ω
83Ω
127Ω
83Ω
50Ω
50Ω
VS
127Ω
83Ω
127Ω
83Ω
CD
CD
Figure 50. Typical LVPECL Application Circuit
POWER AND GROUNDING CONSIDERATIONS AND POWER SUPPLY REJECTION
Many applications seek high speed and performance under less
than ideal operating conditions. In these application circuits,
the implementation and construction of the PCB is as important
as the circuit design. Proper RF techniques must be used for
device selection, placement, and routing, as well as for power
supply bypassing and grounding to ensure optimum performance.
Each power supply pin should have independent decoupling and
connections to the power supply plane. It is recommended that the
device exposed paddle be directly connected to the ground plane
by a grid of at least nine vias. Care should be taken to ensure that
the output traces cannot couple onto the reference or crystal input
circuitry.



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