AD9119BBCZ datasheet(2/66 Pages) AD

2 / 66 page

AD9119/AD9129

Data Sheet

Rev. B | Page 2 of 66

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

DC Specifications ......................................................................... 3

LVDS Digital Specifications ........................................................ 4

HSTL Digital Specifications ........................................................ 4

Serial Port and CMOS Pin Specifications ................................. 5

AC Specifications.......................................................................... 6

Absolute Maximum Ratings............................................................ 7

Thermal Resistance ...................................................................... 7

ESD Caution.................................................................................. 7

Pin Configurations and Function Descriptions ........................... 8

Typical Performance Characteristics ........................................... 12

AD9119 ........................................................................................ 12

AD9129 ........................................................................................ 22

Terminology .................................................................................... 35

Serial Communications Port Overview....................................... 36

Serial Peripheral Interface (SPI) ............................................... 36

General Operation of the SPI.................................................... 36

Instruction Mode (8-Bit Instruction) ...................................... 36

Serial Peripheral Interface Pin Descriptions .......................... 36

MSB/LSB Transfers .................................................................... 37

Serial Port Configuration .......................................................... 37

Theory of Operation ...................................................................... 38

LVDS Data Port Interface.......................................................... 39

Digital Datapath Description ................................................... 42

Reset ............................................................................................. 47

Interrupt Requests...................................................................... 47

Interface Timing Validation.......................................................... 48

Sample Error Detection (SED) Operation .............................. 48

SED Example............................................................................... 48

Analog Interface Considerations.................................................. 49

Analog Modes of Operation ..................................................... 49

Clock Input.................................................................................. 50

PLL ............................................................................................... 50

Voltage Reference ....................................................................... 51

Analog Outputs .......................................................................... 51

Start-Up Sequence...................................................................... 54

Device Configuration Registers.................................................... 55

Device Configuration Register Map ........................................ 55

Device Configuration Register Descriptions.......................... 56

Outline Dimensions ....................................................................... 66

Ordering Guide .......................................................................... 66

REVISION HISTORY

6/2017—Rev. A to Rev. B

Changes to Table 8............................................................................ 9

Changes to Table 9.......................................................................... 11

Changes to Figure 87...................................................................... 27

Added Reset Section....................................................................... 47

Changes to Figure 149.................................................................... 51

Changes to Figure 156.................................................................... 53

Changes to Bits[2:1] Description, Table 29 ................................. 59

Change to Bit 5 Access, Table 37 .................................................. 61

9/2013—Rev. 0 to Rev. A

Changes to Product Title............................................................................ 1

Changes to Features Section and General Description Section....... 1

Changes to Table 1 ........................................................................... 3

Changes to Table 2 and Table 3....................................................... 4

Changes to Dynamic Performance Parameter, Table 5 ............... 6

Changes to Figure 10 and Figure 13............................................. 13

Changes to Figure 21and Figure 23.............................................. 15

Changes to Figure 24 and Figure 27............................................. 16

Changes to Figure 35 and Figure 37............................................. 18

Changes to Figure 62, Figure 65, and Figure 67 ......................... 23

Changes to Figure 76 and Figure 79 ............................................ 25

Changes to Figure 84, Figure 85, and Figure 87 ......................... 27

Changes to Figure 90 and Figure 92 ............................................ 28

Changes to Figure 95 and Figure 97 ............................................ 29

Changes to Figure 118 ................................................................... 33

Change to Serial Communications Port Overview Section .......... 36

Changes to Theory of Operation Section.................................... 38

Changes to LVDS Data Port Interface Section ........................... 39

Changes to Multiple DAC Synchronization Section ................. 44

Change to PLL Section .................................................................. 50

Change to Voltage Reference Section .......................................... 51

Change to Register 0x01, Table 16 ............................................... 54

Changes to Table 17 ....................................................................... 55

Changes to Bit 6, Table 37 ............................................................. 61

Changes to Table 49, Table 50, Table 51, and Table 52 .............. 63

Changes to Table 53, Table 54, Table 55, Table 56, and Table 57 ... 64

1/2013—Revision 0: Initial Version

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