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MAS6512 数据表(PDF) 4 Page - Micro Analog systems |
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MAS6512 数据表(HTML) 4 Page - Micro Analog systems |
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4 / 32 page ![]() DA6512.003 2 December, 2016 4 (32) ELECTRICAL CHARACTERISTICS Operating Conditions: VDD = 2.7 V, TA = -40°C to +85°C, typical values at TA = +27°C, unless otherwise specified. Parameter Symbol Conditions Min Typ Max Unit Internal regulator voltage VREG Temp mode regulator enabled Note 1. 1.75 1.8 1.85 V Standby current ISTBY All inputs at VDD, no load Note 2 0.01 0.3 A Conversion current consumption IDD_CONV During conversion Cap. Dif. Reg OFF Cap. Ratio Reg OFF Temp Reg ON VDD Mon. Reg OFF Note 3 580 510 455 455 850 750 700 700 A Average current consumption IDD_AVG 1 conversion/s, fSYS_CLK=200kHz (SOSC=00) Cap. Dif. Reg OFF OSR=2048 OSR=1024 OSR=512 OSR=256 Note 4 24.1 12.2 6.3 3.3 35.4 18.0 9.2 4.9 A VDD rise time for proper power on reset (POR) tVDD_RISE Note 5 1 ms Internal system clock oscillator frequency Internal system clock oscillator frequency fSYS_CLK Normal clock (SOSC=00) Division by 2 (SOSC=01) Division by 4 (SOSC=10) Division by 8 (SOSC=11) TEMPREGEN=0, Note 6 180 200 100 50 25 210 kHz Normal clock (SOSC=00) TEMPREGEN=1, Note 6 160 180 200 kHz Sensor excitation frequency MCLK Normal clock (SOSC=00) Division by 2 (SOSC=01) Division by 4 (SOSC=10) Division by 8 (SOSC=11) TEMPREGEN=0 45 50 25 12.5 6.25 52.5 kHz Capacitance and VDD monitoring conversion time tCONVCV Normal clock (SOSC=00) OSR=2048 OSR=1024 OSR=512 OSR=256 TEMPREGEN=0 41.6 21.1 10.9 5.8 46.2 23.5 12.1 6.4 ms Temperature conversion Time tCONVT Normal clock (SOSC=00) OSR=2048 OSR=1024 OSR=512 OSR=256 TEMPREGEN=1 46.2 23.5 12.1 6.4 52.0 26.4 13.6 7.2 ms Note 1. Internal regulator must to be enabled only in temperature mode and should be disabled in capacitance and VDD monitoring modes. Note 2. Leakage current may increase if digital input voltages are not close to VDD (logic level high) or GND (logic level low). Also setting XCS low activates the EEPROM memory regardless of the XSPI setting and the device consumes 20 A …30A current. To minimize current consumption XCS should be set low only during time periods when the device is used during SPI communication. Note 3. Conversion current consumption values are measured using CS=CR=7.33pF (CS and CR capacitor matrix registers E3/63HEX and E4/64HEX have value 55HEX) Note 4. Average current consumption in other measurement modes can be calculated by scaling these current consumption values with corresponding conversion current ratios. Example: IDD_AVG(Temp Reg ON, OSR=256)=3.3A*(455A /580A)=2.6A. Note 5. It is also recommended to reset the device manually either by XCLR pin or using reset register after every power up (VDD rise). In case the VDD rise time is longer than specified here the device has to be kept in a reset during power up by the XCLR pin (XCLR=low). Violating this may risk EEPROM memory integrity. See APPLICATION INFORMATION for examples of external POR circuits. Note 6. The clock oscillator is factory calibrated. Calibration stored in the Oscillator frequency trim data EEPROM address (C6/46HEX). |
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