MT7697 datasheet(36/81 Pages) ETC2

36 / 81 page

MT7697

Internet-of-Things Wireless Connectivity

Page 36 of 81

This document contains information that is proprietary to MediaTek Inc. (“MediaTek”) and/or its licensor(s).

Any unauthorized use, reproduction or disclosure of this document in whole or in part is strictly prohibited.

Start address

End address

Function

Power Domain

Software Clock

gating control

Description

0x8104_0000

0x8104_FFFF

CIRQ

TOP_AON

Interrupt controller

for N9

0x8105_8000

0x8105_FFFF

GPT

TOP_AON

General Purpose

Timer for N9

0x8106_0000

0x8106_FFFF

PTA

TOP_OFF(N9)

0x8000_0100[14]

Packet Traffic

Arbitrator for Wi-

Fi/Bluetooth

coexistence

0x8107_0000

0x8107_FFFF

EFUSE_MAC

TOP_OFF(N9)

0x8000_0100[12]

Efuse controller

0x8108_0000

0x8108_FFFF

WDT

TOP_AON

Watchdog Timer for

0x8109_0000

0x8109_FFFF

PDA

TOP_OFF(N9)

Patch Decryption

Accelerator

0x810A_0000

0x810A_FFFF

RDD

TOP_OFF(N9)

0x8000_0100[23]

Wi-Fi debug

0x810B_0000

0x810B_FFFF

BTSBC

TOP_OFF(N9)

0x8000_0100[15]

Bluetooth SBC

accelerator

0x810C_0000

0x810C_FFFF

RBIST

TOP_OFF(N9)

RF BIST

configuration

0x8300_0000

0x810C_FFFF

APB2

CM4_OFF

APB bridge 1

(synchronous to

CM4)

0x8300_0000

0x8300_7FFF

CONFG_CM4

CM4_OFF

System

configuration for

CM4

0x8300_8000

0x8300_BFFF

TOP_CFG_AON_C

TOP_AON

configuration

0x8300_C000

0x8300_EFFF

CONFG_CM4_AON

TOP_AON

System

configuration for

CM4 in TOP_AON

domain

0x8300_F000

0x8300_FFFF

SEC_TOP_CM4

CM4_OFF

0x8300_0200[0]

JTAG security for

CM4

0x8301_0000

0x8301_FFFF

DMA_CM4

CM4_OFF

0x8300_0200[3]

Generic DMA

engine for CM4

0x8302_0000

0x8302_FFFF

UART_DSN

CM4_OFF

0x8300_0200[4]

UART for CM4

debug

0x8303_0000

0x8303_FFFF

UART1

CM4_OFF

0x8300_0200[5]

UART 1 for CM4

0x8304_0000

0x8304_FFFF

UART2

CM4_OFF

0x8300_0200[6]

UART 2 for CM4

0x8305_0000

0x8305_FFFF

GPT_CM4

TOP_AON

General Purpose

Timer for CM4

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