MT7697 datasheet(73/81 Pages) ETC2

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MT7697

Internet-of-Things Wireless Connectivity

Page 73 of 81

This document contains information that is proprietary to MediaTek Inc. (“MediaTek”) and/or its licensor(s).

Any unauthorized use, reproduction or disclosure of this document in whole or in part is strictly prohibited.

QFN

Pin Name

Pin description

PU/PD I/O

Supply domain

AVDD45_MISC

PMU supply

N/A

Input

AVDD25_ALDO_OUT

2.5V ALDO output with external cap.

N/A

Output

PMU_DIO33_OUT

This pin output is to provide 3.3V for all

DVDDIO.

And in OFF mode, this pin is 0V.

N/A

Output

PMU_TEST

PMU test pin

N/A

Output

ISO_INT_PMU_EN

Input 0V for non-RTC platform.

Input 3.3V for RTC platform.

N/A

Input

PMU_EN_WF

External PMU enable

N/A

Input

Power Supplies

AVDD25_AUXADC

Auxiliary ADC 2.5v power supply

N/A

Power

AVSS25_AUXADC

Auxiliary ADC ground

N/A

Ground

DVDDIO_R

Digital 3.3V input

N/A

Power

DVDDIO_D

Digital 3.3V input

N/A

Power

DVDDIO_L

Digital 3.3V input

N/A

Power

14, 17, 30, 49 DVDD11

Digital 1.15V input

N/A

Power

E-PAD

VSS

Common Ground

N/A

Ground

5.3

Pin Multiplexing

The pin multiplexing could be controlled via the configuration register A (in TOP_AON domain) and

the configuration register B (in TOP_OFF/N9 domain). When configuration register A is set to 0, the

configuration register B determines the pin function. When configuration register A is not set to 0,

the configuration register A determines the pin function.

The default function of each pin is highlighted with blue background.

The driving strength of all pins is programmable: 4mA, 8mA, 12mA, and 16mA. The default setting

for all pins are 4mA.

Table 5-3. Pin Multiplexing

Pin alias

APGIO/

GPIO

Name

Dir

Default

dir

Default

PU/PD

Description

Pinx_pinmux_aon_sel

Pinx_pinmux_off_sel

Address

Value

GPIO0

AGPIO

MCU_JTCK

N9 JTAG debug port

0x8102_3020[3:0]

0x8002_5100[3:0]

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