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MT7697 数据表(PDF) 75 Page - List of Unclassifed Manufacturers

部件名 MT7697
功能描述  MT7697 is a highly integrated single chip which features an application processor
PDF  81 Pages
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制造商  ETC2 [List of Unclassifed Manufacturers]
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标志 ETC2 - List of Unclassifed Manufacturers

MT7697 数据表(HTML) 75 Page - List of Unclassifed Manufacturers

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MT7697
Internet-of-Things Wireless Connectivity
© 2016 MediaTek Inc.
Page 75 of 81
This document contains information that is proprietary to MediaTek Inc. (“MediaTek”) and/or its licensor(s).
Any unauthorized use, reproduction or disclosure of this document in whole or in part is strictly prohibited.
Pin
Pin alias
APGIO/
GPIO
Name
Dir
Default
dir
Default
PU/PD
Description
Pinx_pinmux_aon_sel
Pinx_pinmux_off_sel
EINT[5]
I
External interrupt
3
-
12
GPIO7
GPIO
MCU_JTDO
O
O(Lo
w)
N9 JTAG debug port
0x8102_3020[31:28]
0
0x8002_5100[31:28]
(0x8102_3020[31:28]=0)
0
ANTSEL[7]
O
RF control
-
1
SPI_CS_0_M_CM4
O
SPI master chip select 0
6
2
SPI_CS_EXT *
O
External flash interface
7
3
GPIO_TOPOFF[7]
I/O
General purpose input output
-
5
GPIO_TOPAON[7]
General purpose input output
8
-
PWM[5]
O
Pulse-width-modulated output
9
-
EINT[6]
I
External interrupt
3
-
15
GPIO24
GPIO
[Reserved]
[Reserved]
0x8102_302C[3:0]
-
0x8002_510C[3:0]
(0x8102_302C[2:0]=0)
0
UART_DSN_TXD_N9
O
UART_DSN TX (N9)
-
1
SPI_MOSI_M_CM4
O
SPI master MOSI
6
2
SPI_DATA2_EXT *
I/O
External flash interface
7
3
I2C1_CLK
I/O
I2C1 CLK
4
4
GPIO_TOPOFF[24]
I/O
General purpose input output
-
5
GPIO_TOPAON[24]
I/O
General purpose input output
8
-
PWM[25]
O
Pulse width modulation
9
-
[Reserved]
I
I
PU
[Reserved]
1
-
[Reserved]
O
[Reserved]
2
-
18
GPIO25
GPIO
[Reserved]
[Reserved]
0x8102_302C[7:4]
-
0x8002_510C[7:4]
(0x8102_302C[7:4]=0)
0
SPI_MISO_M_CM4
I
SPI master MISO
-
2
SPI_DATA3_EXT *
I/O
External flash interface
7
3
I2C1_DATA
I/O
I2C1 DATA
4
4
GPIO_TOPOFF[25]
I/O
General purpose input output
-
5
GPIO_TOPAON[25]
I/O
General purpose input output
8
-
PWM[26]
O
Pulse width modulation
9
-
[Reserved]
I/O
O
PU
Default: Low.
1
-
FRAME_SYNC *
I
3DD synchronization
2
-
WIC[1]
I
External interrupt
3
-
19
GPIO26
GPIO
[Reserved]
[Reserved]
0x8102_302C[11:8]
-
0x8002_510C[11:8]
(0x8102_302C[11:8]=0)
0
SPI_SCK_M_CM4
O
SPI master SCK
6
2
SPI_CLK_EXT *
O
External flash interface
7
3
I2S_TX
O
I2S TX
4
4
GPIO_TOPOFF[26]
I/O
General purpose input output
-
5
GPIO_TOPAON[26]
I/O
General purpose input output
8
-
PWM[27]
O
Pulse width modulation
9
-
[Reserved]
I/O
O
PU
Default: Low.
1
-
26
GPIO27
GPIO
SWD_DIO
I/O
CM4 SWD debug port
0x8102_302C[15:12]
5
0x8002_510C[15:12]
(0x8102_302C[15:12]=0)
1
I2C0_CLK
O
I2C0 CLK
4
3
GPIO_TOPOFF[27]
I/O
General purpose input output
-
5
GPIO_TOPAON[27]
I/O
General purpose input output
8
-
PWM[28]
O
Pulse width modulation
9
-
[Reserved]
I
I
[Reserved]
1
-
PULSE_CNT
I
Pulse counter input
2
-
WIC[2]
I
External interrupt
3
-
28
GPIO28
GPIO
SWD_CLK
I
CM4 SWD debug port
0x8102_302C[19:16]
5
0x8002_510C[19:16]
(0x8102_302C[19:16]=0)
1
SPI_INT_S_N9
O
SPI
-
2
I2C0_DATA
O
I2C0 DATA
4
3
GPIO_TOPOFF[28]
I/O
General purpose input output
0
5
GPIO_TOPAON[28]
I/O
General purpose input output
8
-
PWM[29]
O
Pulse width modulation
9
-
[Reserved]
I/O
I
[Reserved]
1
-
29
GPIO29
GPIO
I2S_MCLK_S
O
I2S MCLK slave
0x8102_302C[23:20]
-
0x8002_510C[23:20]
0



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