LTC3370 datasheet(7/44 Pages) LINER

7 / 44 page

LTC3372

Rev. A

For more information www.analog.com

The l denotes the specifications which apply over the specified operating

junction temperature range, otherwise specifications are at TA = 25°C (Note 2), VIN = 12V, VRUN = 5V, VOUT = VINA-H = 3.3V unless

otherwise noted.

ELECTRICAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX UNITS

Interface Logic Pins (EN1, EN2, EN3, EN4)

VEN

Enable Rising Threshold

All LV Regulators Disabled

400

730

1200

Enable Rising Threshold

At Least One LV Regulator Enabled

380

400

420

Enable Falling Threshold

290

315

340

IEN

Enable Pin Leakage Current

EN = 3.3V

µA

CT Timing Parameters; CT = 10nF

tWDIO

Time from WDO Low Until Next WDO Low

CT = 10nF

9.7

12.9

16.1

tWDI

Time from Last WDI Until Next WDO Low

CT = 10nF

1.22

1.62

2.03

tWDO

WDO Low Time Absent a Transition at WDI

CT = 10nF

160

202

280

tRST

RST Assertion Delay

CT = 10nF

160

202

280

tWDL

Watchdog Lower Boundary

CT = 10nF

50.6

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3372 is tested under pulsed load conditions such that

TJ ≈ TA. The LTC3372E is guaranteed to meet specifications from 0°C

to 85°C operating junction temperature. Specifications over the –40°C

to 125°C operating junction temperature range are assured by design,

characterization and correlation with statistical process controls. The

LTC3372I is guaranteed over the –40°C to 125°C operating junction

temperature range. The LTC3372H is guaranteed over the –40°C to 150°C

operating junction temperature range. High junction temperatures degrade

operating lifetimes; operating lifetime is derated for junction temperatures

greater than 125°C. Note that the maximum ambient temperature

consistent with these specifications is determined by specific operating

conditions in conjunction with board layout, the rated package thermal

impedance and other environmental factors. The junction temperature (TJ

in °C) is calculated from the ambient temperature (TA in °C) and power

dissipation (PD in Watts) according to the formula:

TJ = TA + (PD • θJA)

where θJA (in °C/W) is the package thermal impedance.

Note 3: This IC includes overtemperature protection which protects the

device during momentary overload conditions. Junction temperatures

will exceed 150°C when overtemperature protection is active. Continuous

operation above the specified maximum operating junction temperature

may impair device reliability.

Note 4: The IQ (Total Input Supply Quiescent Current) is the total average

current drawn from the input power supply by a typical application in Burst

Mode with no load currents (from either the HV Controller VOUT or the LV

Regulators’ VOUT1-4).

Note 5: The HV Controller’s output regulation is tested in a feedback loop

that servos the ITH pin to a specified voltage and measures the resulted

voltage at VOUT/EXTVCC pin.

Note 6: Delays are measured using 50% levels, with TG and BG driving

minimum capacitive load.

Note 7: The minimum on-time conditions is specified for an inductor

peak-to-peak ripple current ≥40% of IMAX (see Minimum On-Time

Considerations in the Applications Information section).

Note 8: The IQ(VINA-H) (Quiescent Current into VINA-H Pins) are measured

with power switches not switching. Dynamic supply current when

switching may be higher due to the gate charge being delivered.

Note 9: The current limit features are intended to protect the IC from short

term or intermittent fault conditions. Continuous operation above the

maximum specified pin current rating may result in device degradation

over time.

Note 10: The soft-start is the time from the first top switch turn on,

after an enable rising, until the feedback has reached 90% of its nominal

regulation voltage.

Note 11: Do not apply a voltage or current source to these pins. They

must be connected to the gates of the external power MOSFETs, otherwise

permanent damage may occur.

LTC3370 数据表(PDF) 7 Page - Linear Technology

LTC3370 数据表(HTML) 7 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

数据表下载

链接网址

LTC3370 数据表(PDF) 7 Page - Linear Technology

LTC3370 数据表(HTML) 7 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

数据表 下载

链接网址

数据表下载