| 数据搜索系统,热门电子元器件搜索 |
|
GD25S512MDFJS 数据表(PDF) 15 Page - GigaDevice Semiconductor (Beijing) Inc. |
|
|
|||||||||||||||||||||||||||||
GD25S512MDFJS 数据表(HTML) 15 Page - GigaDevice Semiconductor (Beijing) Inc. |
|
15 / 87 page ![]() 3.3V Uniform Sector Dual and Quad Serial Flash GD25S512MD 15 Program/Erase Suspend (75H) command (The Erase Suspend will set the SUS1 to 1,and the Program Suspend will set the SUS2 to 1). The SUS1 and SUS2 bit are cleared to 0 by Program/Erase Resume (7AH) command, software reset (66H+99H) command as well as a power-down, power-up cycle. PE bit The Program Error (PE) bit is a read only bit that indicates a program failure. It will also be set when the user attempts to program a protected array sector or access the locked OTP space. Error bits can be reset by CLEAR FLAG STATUS REGISTER command (30H). EE bit The Erase Error (EE) bit is a read only bit that indicates an erase failure. It will also be set when the user attempts to erase a protected array sector or access the locked OTP space. Error bits can be reset by CLEAR FLAG STATUS REGISTER command (30H). ADP bit The Address Power-up (ADP) bit is a non-volatile writable bit that determines the initial address mode when the device is powered on or reset. This bit is only used during the power on or device reset initialization period. When ADP=0(factory default), the device will power up into 3-Byte address mode, the Extended Address Register must be used to access memory regions beyond 128Mb. When ADP=1, the device will power up into 4-Byte address mode directly. Power Up Device Initialization & Status Register Refresh (Non-Volatile Cells) 4-Byte Address Standard SPI Dual SPI Quad SPI 3-Byte Address Standard SPI Dual SPI Quad SPI Enable 4-Byte (B7H) Disable 4-Byte (E9H) ADP bit value ADP = 0 ADP = 1 ADS bit The Address Status (ADS) bit is a read only bit that indicates the current address mode the device is operating in. The device is in 3-Byte address mode when ADS=0 (default), and in 4-Byte address mode when ADS=1. DRV1, DRV0 bits The DRV1&DRV0 bits are used to determine the output driver strength for the Read operations. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |