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GD25S512MDFJS 数据表(PDF) 86 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25S512MDFJS 数据表(HTML) 86 Page - GigaDevice Semiconductor (Beijing) Inc. |
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86 / 87 page ![]() 3.3V Uniform Sector Dual and Quad Serial Flash GD25S512MD 86 11. REVISION HISTORY Version No Description Page Date 1.0 Initial Release All 2018-1-17 1.1 Add E,3,2,A to the 7th code of ordering information P74 2018-2-26 1.2 Modify the content @37H:34H of SFDP from 1FFFFFFFH to 0FFFFFFFH Add the content @A3H:9CH of SFDP P62 P66-67 2018-3-6 1.3 Modify SFDP: the content @13H from 03H to 05H Modify tVSL min value from 5ms to 2.5ms Add tRS, of which the min value is 100us P60 P71 P74 2018-3-28 1.4 Modify SFDP @13H, 9AH, 9BH addr. Delete SFDP @9CH:A3H addr. Modify tw typ. value from 1ms to 5ms P61, 67 P73 2018-5-2 1.5 Modify the note of QE bit Modify Icc1 typ. value from 30uA to 24uA Modify tPP typ. value from 0.6ms to 0.4ms Modify tBE1 typ. value from 0.2s to 0.16s Modify tBE2 typ. value from 0.3s to 0.22s Modify tCE from 100-240s to 70-200s Add DC/AC characteristics @-40℃~105℃ Update Ordering Information P13 P72 P74 P74 P74 P74 P73, 75 P78-79 2018-7-4 1.6 Modify Figure 64 Program Security Registers command Sequence Diagram (ADS=0) Modify Figure 65 Program Security Registers command Sequence Diagram (ADS=1) Update DC/AC characteristics @-40℃~105℃ Add DC/AC characteristics @-40℃~125℃ Update Ordering Information P58 P58 P74/76 P75/P77 P79 2018-9-25 1.7 Modify the description of DRV bits P16 2019-4-16 |
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