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GD25S512MDFJS 数据表(PDF) 17 Page - GigaDevice Semiconductor (Beijing) Inc.

部件名 GD25S512MDFJS
功能描述  3.3V Uniform Sector Dual and Quad Serial Flash
PDF  87 Pages
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制造商  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
网页  http://www.gigadevice.com/
标志 GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25S512MDFJS 数据表(HTML) 17 Page - GigaDevice Semiconductor (Beijing) Inc.

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3.3V Uniform Sector
Dual and Quad Serial Flash
GD25S512MD
17
6.2. Extended Address Register
Table 12 Extended Address Register (Single Die GD25B256D)
No.
Name
Description
Note
EA0
A24
Address bit
Volatile writable
EA1
Reserved
Reserved
Reserved
EA2
Reserved
Reserved
Reserved
EA3
Reserved
Reserved
Reserved
EA4
Reserved
Reserved
Reserved
EA5
Reserved
Reserved
Reserved
EA6
Reserved
Reserved
Reserved
EA7
Reserved
Reserved
Reserved
In addition to the Status Registers, each GD25B256D device provides a volatile Extended Address Register which
consists of the 4th Byte of memory address. The extended address register is only used when the address mode is 3-Byte
address mode, as to set the higher address. The lower 128Mb memory array (00000000H-00FFFFFFH) is selected when
A24=0, all instructions with 3-Byte addresses will be executed within that region. When A24=1, the upper 128Mb memory
array (01000000H-01FFFFFFH) will be selected.
If the device powers up with ADP bit set to 1, or an “Enter 4-Byte Address Mode (B7H)” instruction is issued, the device
will require 4-Byte address input for all address related instructions, and the Extended Address Register setting will be
ignored. However, any instruction with 4-Byte address input will replace the Extended Address Register Bit A24 with new
settings.
It is recommended to set the value of the reserved bit
as “0”
Upon power up or after the execution of a Software/Hardware Reset, the extended address register values will be
cleared to 0.



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