“This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion LLC deems the products

to have been in sufficient production volume such that subsequent versions of this document are not expected to change. However, typographical

or specification corrections, or modifications to the valid combinations offered may occur.”

Publication Number S29AL008D_00

Revision A Amendment 3 Issue Date June 16, 2005

This document has not been approved. Sharing this document with non-Spansion employees violates QS9000/TS16949 requirements.

S29AL008D

8 Megabit (1 M x 8-Bit/512 K x 16-Bit)

CMOS 3.0 Volt-only Boot Sector Flash Memory

Data Sheet

Distinctive Characteristics

Architectural Advantage

Single power supply operation

— 2.7 to 3.6 volt read and write operations for battery-

powered applications

Manufactured on 200nm process technology

— Compatible with 0.32 µm and 230nm Am29LV160

devices

Flexible sector architecture

— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen

64 Kbyte sectors (byte mode)

— One 8 Kword, two 4 Kword, one 16 Kword, and fifteen

32 Kword sectors (word mode)

— Supports full chip erase

— Sector Protection features:

— A hardware method of locking a sector to prevent

any program or erase operations within that sector

— Sectors can be locked in-system or via programming

equipment

— Temporary Sector Unprotect feature allows code

changes in previously locked sectors

Unlock Bypass Program Command

— Reduces overall programming time when issuing

multiple program command sequences

Top or bottom boot block configurations

available

Embedded Algorithms

— Embedded Erase algorithm automatically

preprograms and erases the entire chip or any

combination of designated sectors

— Embedded Program algorithm automatically writes

and verifies data at specified addresses

Compatibility with JEDEC standards

— Pinout and software compatible with single-power

supply Flash

— Superior inadvertent write protection

Performance Characteristics

High performance

— Access times as fast as 55 ns

— Extended temperature range (-40°C to +125°C)

Ultra low power consumption (typical values

at 5 MHz)

— 200 nA Automatic Sleep mode current

— 200 nA standby mode current

— 7 mA read current

— 15 mA program/erase current

Cycling endurance: 1,000,000 cycles per

sector typical

Data retention: 20 years typical

— Reliable operation for the life of the system

Package option

48-ball FBGA

48-pin TSOP

44-pin SO

Software Features

Data# Polling and toggle bits

— Provides a software method of detecting program or

erase operation completion

Erase Suspend/Erase Resume

— Suspends an erase operation to read data from, or

program data to, a sector that is not being erased,

then resumes the erase operation

Hardware Features

Ready/Busy# pin (RY/BY#)

— Provides a hardware method of detecting program or

erase cycle completion

Hardware reset pin (RESET#)

— Hardware method to reset the device to reading array

data