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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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DP83821 数据表(PDF) 36 Page - National Semiconductor (TI) |
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DP83821 数据表(HTML) 36 Page - National Semiconductor (TI) |
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36 / 86 page  36 www.national.com 4.0 Register Set (Continued) 4.1.5 Configuration IO Base Address Register This register specifies the Base I/O address which is required to build an address map during configuration. It also specifies the number of bytes required as well as an indication that it can be mapped into I/O space. 4.1.6 Configuration Memory Address Register This register specifies the Base Memory address which is required to build an address map during configuration. It also specifies the number of bytes required as well as an indication that it can be mapped into memory space. 4.1.7 Configuration Memory Address High Dword Register This register specifies the upper 32-bits of the Base Memory address which is required to build an address map during configuration. Tag: CFGIOA Size: 32 bits Hard Reset: 00000001h Offset: 10h Access: Read Write Soft Reset: Unchanged bit tag description usage 31-8 IOBASE Base IO Address This is set by software to the base IO address for the Operational Register Map. 7-2 IOSIZE Size indication Read back as 0. This allows the PCI bridge to determine that the DP83821 requires 256 bytes of IO space. 1 Unused Unused (reads return 0). 0 IOIND IO Space Indicator Read Only. Set to 1 by DP83821 to indicate that DP83821 is capable of being mapped into IO space. Tag: CFGMA Size: 32 bits Hard Reset: 00000000h Offset: 14h Access: Read Write Soft Reset: unchanged bit tag description usage 31-12 MEMBASE Memory Base Address This is set by software to the base address for the Operational Register Map. 11-4 MEMSIZE Memory Size These bits return 0, which indicates that the DP83821 requires 4096 bytes of Memory Space (the minimum recommended allocation). 3 MEMPF Prefetchable Read Only. Set to 0 by DP83821. 2-1 MEMLOC Location Selection Read Only. Set to 00 by DP83821 for target 32-bit addressing. Loaded from EEPROM (location 05h, bit 3) at power-up and is reflected in the CFG:T64ADDR bit in operational register space. Must be a 0. 0 MEMIND Memory Space Indicator Read Only. Set to 0 by DP83821 to indicate that DP83821 is capable of being mapped into memory space. Tag: CFGMA1 Size: 32 bits Hard Reset: 00000000h Offset: 18h Access: Read Write Soft Reset: unchanged bit tag description usage 31-0 MEMBASE1 Memory Base High Address This is set by software to the upper 32-bits of the base address for the Operational Register Map. This field is read-only and always returns 0. |
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