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CDCDB2000NPPR 数据表(PDF) 25 Page - Texas Instruments |
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CDCDB2000NPPR 数据表(HTML) 25 Page - Texas Instruments |
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25 / 33 page ![]() 25 CDCDB2000 www.ti.com SNAS787 – NOVEMBER 2019 Product Folder Links: CDCDB2000 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Typical Application (continued) 8.2.2.1 Output Enable Control Method If the SMBus and OE# pins should be used for controlling output states, the SBEN pin should be tied to a low potential. This could be selected for hot swapping where pin control by a CPLD or other hot swap controller is needed to enable/disable the reference clock to safeguard against backdriving a connected device. 8.2.2.2 SMBus Address An SMBus address should be selected from the listed potential addresses in Table 1. The appropriate pullup or pulldown resistor should be placed on the SADRx pins as indicated in the table. Ensure the SMBus address is not already in use to avoid conflict. 8.2.3 Application Curve The graph listed in Table 16 is used as both an application curve and a typical characteristics plot (see the Typical Characteristics section). Table 16. Table of Graphs TITLE FIGURE CDCDB2000 Clock Out (CK0:19) Phase Noise Figure 5 |
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