15

ATSAM9743

1773B–DRMSD–11/02

Overview of

Operation

This section limits its contents to a description of the operation and registers specific to the

ATSAM9743. A familiar understanding of the ATSAM97xx series operation is required.

Normal Operation

Mode

TEST2 = TEST1 = TEST0 = O:

In this mode, the built-in Flash is assumed to be already programmed. After RESET, all pins

are in configuration #1 and all general purpose I/Os (64 pins) are in input mode with a weak

pull-down resistor.

The P16 program starts at address 8000H, which is the first word of the internal Flash.

The program coded in Flash or into external memory has access to nine specific 16-bit regis-

ters as follows.

I/O Configuration

Register Address

20:0808H (Read/Write)

This register is cleared at reset. A one written to the register indicates that the corresponding alternate configuration #2 is

selected as follows:

•

RAM: WA[15:0], WD[7:0], WCS1, WOE, WWE, RBS

•ROM: WCS0, WD[15:8]

•

AD[20:16], Respective WA[20:16] signals

•HOST: CS, RD, WR, A0, D[7:0]

•

IRQ: IRQ

•

DABD1, DABD0, RUN, MIDI_IN, MIDI_OUT: Corresponding pins

I/O Direction Registers

Address 20:0804H to

20:0807H (Read/Write)

These four registers (one for each General-purpose I/O port P0 to P3) are cleared at reset,

thus putting all port bits in input mode.

A one in a given bit position configures the corresponding port bit in output mode (assuming

that no alternate function is selected for the port bit).

I/O Data Write Registers

Address 20:0800H to

20:803H (Read/Write)

These four registers (one for each General Purpose I/O port P0 to P3) are cleared at power-

up. A 0/1 written in a given bit position sets the corresponding port bit to 0/1, assuming that no

alternate function is selected for the port bit and that the port bit is in output mode.

A read from the register always returns the value written to the register independently of the

actual port configuration.

I/O Data Reads Registers

Address 20:810H to

20:0813H (Read-only)

A read from these registers always returns the value of the pins independently of the configu-

ration. For example, suppose that P3.10 is configured as MIDI_IN, then setting the direction to

output and writing data to P3.10 will have no effect. However, the actual value of the MIDI_IN

pin would be read.

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

XX

MIDI_

OUT

MIDI_

IN

RUN

DAAD0 DABD1

IRQ

HOST

AD20

AD19

AD18

AD17

AD16

ROM

RAM