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PWD13F60

Functional description

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6

Functional description

6.1

Logic inputs

The PWD13F60 has four logic inputs to independently control the high side and low side

internal MOSFETs.

An interlocking feature is offered to avoid undesired simultaneous turn on of of both HS and

LS MOSFETs within the same channel (see Table 9).

The logic inputs have internal pull-down resistors. The purpose of these resistors is to pull

logic inputs low in case, for example, there is an interruption in the logic lines or the

controller outputs are in tri-state condition. In this case the gate driver outputs are set to the

low level and the corresponding MOSFETs are turned off.

Table 9. Truth table

HINx

LINx

HSx

LSx

0

0

OFF

OFF

0

1

OFF

ON

1

0

ON

OFF

1

1

OFF

OFF