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TDA7786 数据表(PDF) 19 Page - STMicroelectronics |
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TDA7786 数据表(HTML) 19 Page - STMicroelectronics |
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19 / 54 page ![]() DocID026122 Rev 5 19/54 TDA7786, TDA7786M Function description 53 2.15 I2S - serial audio interface The audio SAI serves as stereo input/output audio bus interface (e.g. to an external audio processor, or from an external HD decoder) using the I2S protocol. The latter calls for a bit clock line, a word select line and data lines; the SAI interface on the TDA7786x has one input data line and one output data line. The audio SAI lines are: SAI_AUDIO_CLK (pin 37, bit clock line), SAI_AUDIO_WCLK (pin 38, word select (frame) clock line), SAI_AUDIO_DO (pin 39, data output line), SAI_AUDIO_DI (pin 40, data input line). In master mode SAI_AUDIO_BCLK and SAI_AUDIO_WCLK are outputs, in slave mode these pins are inputs. The input and output data lines are operated at the same sampling frequency. The bit clock has one pulse for each discrete bit of data on the data lines. The bit clock operates at a frequency which is a multiple of the sample rate, and is equal to the sampling frequency times the number of bits per word times two. Figure 7. I2S interface timing (receiver) Note: The polarity of the signals and the data bit-shift direction can be selected by configuration bits. Table 6. Audio I2S configuration overview SAI 1x2 In and 1x2 Out 16/32 16/24 4 I2S M/S 32-48 32-48 12.288 MHz |
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