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TLV9152SIRUGR 数据表(PDF) 7 Page - Texas Instruments

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部件名 TLV9152SIRUGR
功能描述  TLV915x 4.5-MHz, Rail-to-Rail Input/Output, Low Offset Voltage, Low Noise Op Amp
PDF  63 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TLV9152SIRUGR 数据表(HTML) 7 Page - Texas Instruments

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background image
1
IN1+
12
IN4+
2
V+
11
V±
3
IN2+
10
IN3+
4
IN2±
9
IN3±
Not to scale
Thermal
Pad
1
IN1±
2
IN1+
3
V+
4
IN2+
5
IN2±
8
IN3±
9
IN3+
10
V±
11
IN4+
12
IN4±
Not to scale
1
OUT1
14
OUT4
2
IN1±
13
IN4±
3
IN1+
12
IN4+
4
V+
11
V±
5
IN2+
10
IN3+
6
IN2±
9
IN3±
7
OUT2
8
OUT3
Not to scale
7
TLV9151, TLV9152, TLV9154
www.ti.com
SBOS986B – OCTOBER 2019 – REVISED MAY 2020
Product Folder Links: TLV9151 TLV9152 TLV9154
Submit Documentation Feedback
Copyright © 2019–2020, Texas Instruments Incorporated
TLV9154 D and PW Package(1)
14-Pin SOIC and TSSOP
Top View
(1)
Package is preview only.
TLV9154 RTE Package(1)(2)
16-Pin WQFN With Exposed Thermal Pad
Top View
(1)
Connect thermal pad to V–. See Packages
With an Exposed Thermal Pad section for
more information.
(2)
Package is preview only.
TLV9154 RUC Package(1)
14-Pin X2QFN With Exposed Thermal Pad
Top View
(1)
Package is preview only.



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