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USB334X 数据表(PDF) 27 Page - Microchip Technology

部件名 USB334X
功能描述  Enhanced Single Supply Hi-Speed USB ULPI Transceiver
PDF  92 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

USB334X 数据表(HTML) 27 Page - Microchip Technology

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 2009-2018 Microchip Technology Inc.
DS00002646A-page 27
USB334x
Note 5-1
When RESETB = 0 The HS termination will tri-state the USB drivers
Note 5-2
The transceiver operation is not maintained in a combination that is not defined.
The USB334x uses the 27% resistor ECN resistor tolerances. The resistor values are shown in Table 4-6.
5.3
Bias Generator
This block consists of an internal bandgap reference circuit used for generating the driver current and the biasing of the
analog circuits. This block requires an external 8.06KΩ,1% tolerance, reference resistor connected from RBIAS to
ground. This resistor should be placed as close as possible to the USB334x to minimize the trace length. The nominal
voltage at RBIAS is 0.8V +/- 10% and therefore the resistor will dissipate approximately 80 µW of power.
Peripheral HS/FS Suspend
01b
1b
00b
0b
0b
1b
0b
0b
0b
0b
Peripheral HS/FS Resume
01b
1b
10b
0b
0b
1b
0b
0b
0b
0b
Peripheral LS
10b
1b
00b
0b
0b
0b
1b
0b
0b
0b
Peripheral LS Suspend
10b
1b
00b
0b
0b
0b
1b
0b
0b
0b
Peripheral LS Resume
10b
1b
10b
0b
0b
0b
1b
0b
0b
0b
Peripheral Test J/Test K
00b
0b
10b
0b
0b
0b
0b
0b
0b
1b
OTG device, Peripheral Chirp
00b
1b
10b
0b
1b
1b
0b
0b
1b
0b
OTG device, Peripheral HS
00b
0b
00b
0b
1b
0b
0b
0b
1b
1b
OTG device, Peripheral FS
01b
1b
00b
0b
1b
1b
0b
0b
1b
0b
OTG device, Peripheral HS/FS Suspend
01b
1b
00b
0b
1b
1b
0b
0b
1b
0b
OTG device, Peripheral HS/FS Resume
01b
1b
10b
0b
1b
1b
0b
0b
1b
0b
OTG device, Peripheral Test J/Test K
00b
0b
10b
0b
1b
0b
0b
0b
1b
1b
Charger Detection
Connect Detect
01b
0b
00b0b
1b
0b0b0b1b0b
Any combination not defined above,
Note 5-2
0b
0b
1b
1b
0b
Note:
• This is equivalent to Table 40, Section 4.4 of the ULPI 1.1 specification.
• USB334x does not support operation as an upstream hub port. See Section 6.4.1.3, "UTMI+ Level 3," on
page 53.
TABLE 5-1:
DP/DM TERMINATION VS. SIGNALING MODE (CONTINUED)
Signaling Mode
ULPI Register Settings
USB334x Termination
Resistor Settings



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