USB334X datasheet(31/92 Pages) MICROCHIP

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DS00002646A-page 31

USB334x

For peripheral-only or host-only bus-powered applications, the input to VBAT may be derived from the VBUS pin of the

USB connector. In this configuration, the supply must be capable of withstanding any transient voltage present at the

VBUS pin of the USB connector. Microchip does not recommend connecting the VBAT pin to the VBUS terminal of the

USB connector.

5.6.2

POWER ON RESET (POR)

The USB334x provides a POR circuit that generates an internal reset pulse after the VDD18 supply is stable. After the

internal POR goes high the USB334x will release from reset and begin normal ULPI operation as described in Note 5-3.

The ULPI registers will power up in their default state summarized in Table 7-1 when the 1.8V supply comes up. Cycling

the RESETB pin can also be used to reset the ULPI registers to their default state (and reset all internal state machines)

by bringing the pin low for a minimum of 1 microsecond and then high. It is not necessary to wait for the VDD33 and

VDD18 pins to discharge to 0 volts to reset the part.

The RESETB pin must be pulled high to enable the 3.3V and 1.8V regulators. A pull-down resistor is not present on the

RESETB pin and therefore the system should drive the RESETB pin to the desired state at all times. If the system does

not need to place the USB334x into reset mode the RESETB pin can be connected to a supply between 1.8V and 3.3V.

5.6.3

RECOMMENDED POWER SUPPLY SEQUENCE

For USB operation, the USB334x requires a valid voltage on the VBAT and VDDIO pins. The VDD33 and VDD18 reg-

ulators are automatically enabled when the RESETB pin is brought high. Table 5-2 presents the power supply configu-

rations in more detail.

The RESETB pin can be held low until the VBAT supply is stable. If the Link is not ready to interface the USB334x, the

Link may choose to hold the RESETB pin low until it is ready to control the ULPI interface.

Note 5-3

VDDIO must be present for ULPI pins to tri-state.

Note 5-4

USB3343 only.

5.6.4

START-UP

The power on default state of the USB334x is ULPI Synchronous mode. The USB334x requires the following conditions

to begin operation: the power supplies must be stable, the REFCLK must be present and the RESETB pin must be high.

After these conditions are met, the USB334x will begin ULPI operation that is described in Section 6.0, "ULPI Opera-

tion," on page 42.

Figure 5-6 below shows a timing diagram to illustrate the start-up of the USB334x. At T0, the supplies are stable and

the USB334x is held in reset mode. At T1, the Link drives RESETB high after the REFCLK has started. The RESETB

pin may be brought high asynchronously to REFCLK. Once, the 3.3V and 1.8V internal supplies become stable the

USB334x will apply the 15 KΩ pull downs to the data bus and assert DIR until the internal PLL has locked. After the PLL

has locked, the USB334x will check that the Link has de-asserted STP and at T2 it will de-assert DIR and begin ULPI

operation.

The ULPI bus will be available as shown in Figure 5-6 in the time defined as TSTART given in Table 4-3. If the REFCLK

signal starts after the RESETB pin is brought high, then time T0 will begin when REFCLK starts. TSTART also assumes

that the Link has de-asserted STP. If the Link has held STP high the USB334x will hold DIR high until STP is de-

asserted. When the LINK de-asserts STP, it must be ready drive the ULPI data bus to idle (00h) for a minimum of one

clock cycle after DIR de-asserts.

TABLE 5-2:

OPERATING MODE VS. POWER SUPPLY CONFIGURATION

VBAT

VDDIO

(Note 5-4)

RESETB

Operating Modes Available

Powered Off

RESET Mode. (Note 5-3)

Full USB operation as described in Section 6.0, "ULPI

Operation," on page 42.

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