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USB334X 数据表(PDF) 16 Page - Microchip Technology |
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USB334X 数据表(HTML) 16 Page - Microchip Technology |
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16 / 92 page ![]() USB334x DS00002646A-page 16 2009-2018 Microchip Technology Inc. Note 4-1 ClockSuspendM bit = 0. Note 4-2 SessEnd, VbusVld, and IdFloat comparators disabled. STP Interface protection disabled. Note 4-3 REFCLK is OFF 4.2 Clock Specifications The model number for each frequency of REFCLK is provided in "Product Identification System", Example a. 4.3 ULPI Interface Timing RESET Mode Note 4-3 IVBAT(RSTB) RESETB = 0 VVBAT = 4.2V VVDDIO = 1.8V 0.1 1 12 uA IVIO(RSTB) 00 7 uA TABLE 4-3: CLOCK SPECIFICATIONS Parameter Symbol Conditions MIN TYP MAX Units Suspend Recovery Time TSTART LPM Enable = 0 1.0 1.1 1.2 ms TSTART_LPM LPM Enable = 1 125 150 uS PHY Preparation Time 60 MHz REFCLK TPREP LPM Enable = 0 1.0 1.1 1.2 ms TPREP_LPM LPM Enable = 1 125 150 uS CLKOUT Duty Cycle DCCLKOUT ULPI Clock Input Mode 45 55 % REFCLK Duty Cycle DCREFCLK 20 80 % REFCLK Frequency Accuracy FREFCLK -500 +500 PPM Note: •TSTART and TPREP are measured from the time when REFCLK and RESETB are both valid to when the USB334x de-asserts DIR. • The USB334x uses the AutoResume feature, Section 6.4.1.4, "Host Resume K," on page 53, to allow a host start-up time of less than 1ms. TABLE 4-4: ULPI INTERFACE TIMING Parameter Symbol Conditions MIN MAX Units 60 MHz ULPI Output Clock Note 4-4 Setup time (STP, data in) TSC, TSD Model-specific REFCLK 5.0 ns Hold time (STP, data in) THC, THD Model-specific REFCLK 0.0 ns Output delay (control out, 8-bit data out) TDC, TDD Model-specific REFCLK 1.5 6 ns 60 MHz ULPI Input Clock Setup time (STP, data in) TSC, TSD 60 MHz REFCLK 3ns Hold time (STP, data in) THC, THD 60 MHz REFCLK 0ns Output delay (control out, 8-bit data out) TDC, TDD 60 MHz REFCLK 0.5 6.0 ns TABLE 4-2: OPERATING CURRENT (USB3343) (CONTINUED) Parameter Symbol Conditions MIN TYP MAX Units |
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