USB334X datasheet(53/92 Pages) MICROCHIP

53 / 92 page

 2009-2018 Microchip Technology Inc.

DS00002646A-page 53

USB334x

modes of operation. The transmitter decodes the inputs of XcvrSelect[1:0], TermSelect, OpMode[1:0], DpPulldown, and

DmPulldown to determine what operation is expected. Users must strictly adhere to the modes of operation given in

Table 5-1.

Several important functions for a device and host are designed into the transmitter blocks.

The USB334x transmitter will transmit a 32-bit long Hi-Speed sync before every Hi-Speed packet. In Full and Low Speed

modes a 8-bit sync is transmitted.

When the device or host needs to chirp for Hi-Speed port negotiation, the OpMode = 10 setting will turn off the bit-stuffing

and NRZI encoding in the transmitter. At the end of a chirp, the USB334x OpMode register bits should be changed only

after the RXCMD linestate encoding indicates that the transmitter has completed transmitting. Should the opmode be

switched to normal bit-stuffing and NRZI encoding before the transmit pipeline is empty, the remaining data in the pipe-

line may be transmitted in an bit-stuff encoding format.

Please refer to the ULPI specification for a detailed discussion of USB reset and HS chirp.

6.4.1

USB334X HOST FEATURES

The USB334x can also support USB Host operation and includes the following features that are required for Host oper-

ation.

6.4.1.1

Hi-Speed Long EOP

When operating as a Hi-Speed host, the USB334x will automatically generate a 40 bit long End of Packet (EOP) after

a SOF PID (A5h). The USB334x determines when to send the 40-bit long EOP by decoding the ULPI TX CMD bits [3:0]

for the SOF. The 40-bit long EOP is only transmitted when the DpPulldown and DmPulldown bits in the OTG Control

In device mode, the USB334x will not send a long EOP after a SOF PID.

6.4.1.2

Low Speed Keep-Alive

Low Speed keep alive is supported by the USB334x. When in Low Speed mode, the USB334x will send out two Low

Speed bit times of SE0 when a SOF PID is received.

6.4.1.3

UTMI+ Level 3

Pre-amble is supported for UTMI+ Level 3 compatibility. When XcvrSelect is set to (11b) in host mode, (DpPulldown and

DmPulldown both asserted) the USB334x will pre-pend a Full Speed pre-amble before the Low Speed packet. Full

Speed rise and fall times are used in this mode. The pre-amble consists of the following: Full Speed sync, the encoded

pre-PID (C3h) and then Full Speed idle (DP=1 and DM = 0). A Low Speed packet follows with a sync, data and a LS EOP.

The USB334x will only support UTMI+ Level 3 as a host. The USB334x does not support UTMI+ Level 3 as a peripheral.

A UTMI+ Level 3 peripheral is an upstream hub port. The USB334x will not decode a pre-amble packet intended for a

LS device when the USB334x is configured as the upstream port of a FS hub, XcvrSelect = 11b, DpPulldown = 0b,

DmPulldown =0b.

6.4.1.4

Host Resume K

Resume K generation is supported by the USB334x. At the end of a USB Suspend the PHY will drive a K back to the

downstream device. When the USB334x exits from Low Power Mode, when operating as a host, it will automatically

transmit a Resume K on DP/DM. The transmitters will end the K with SE0 for two Low Speed bit times. If the USB334x

was operating in Hi-Speed mode before the suspend, the host must change to Hi-Speed mode before the SE0 ends.

SE0 is two Low Speed bit times which is about 1.2 us. For more details please see sections 7.1.77 and 7.9 of the USB

Specification.

In device mode, the resume K will not append an SE0, but release the bus to the correct idle state, depending upon the

operational mode as shown in Table 5-1.

The ULPI specification includes a detailed discussion of the resume sequence and the order of operations required. To

support Host start-up of less than 1mS the USB334x implements the ULPI AutoResume bit in the Interface Control reg-

ister. The default AutoResume state is 0 and this bit should be enabled for Host applications.

6.4.1.5

No SYNC and EOP Generation (OpMode = 11)

UTMI+ defines OpMode = 11 where no sync and EOP generation occurs in Hi-Speed operation. This is an option to the

ULPI specification and not implemented in the USB334x.

USB334X 数据表(PDF) 53 Page - Microchip Technology

USB334X 数据表(HTML) 53 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

数据表下载