ADAR2001ACCZ datasheet(16/39 Pages) AD

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ADAR2001

Data Sheet

Rev. 0 | Page 16 of 39

APPLICATIONS INFORMATION

SPI CONTROL

The ADAR2001 is designed to operate as part of a larger array.

The built in state machines help to ease the control of multiple

chips in parallel and to ensure that the fastest switching speeds

are achieved. However, it is possible to operate every aspect of

the ADAR2001 using the SPI port alone. When the state machines

are disabled by setting MULT_SEQ_EN (Register 0x018, Bit 7)

and TX_SEQ_EN (Register 0x016, Bit 7) low, the multiplier/filter

and transmitter blocks respond to the SPI controlled registers

(Register 0x045 to Register 0x048), rather than stepping

through the programmed states.

block when controlling the block with the SPI and have all the

same controls as a typical multiplier/filter mode when

controlling the block with the multiplier/filter sequencer.

when controlling the block with the SPI and have all the same

controls as a typical transmitter mode when controlling the

block with the transmitter sequencer.

Operating the ADAR2001 in this manner can be thought of as a

manual, rather than an automatic, approach. With the sequencers

disabled, any changes to the configuration of the chip must occur

through a SPI write.

STATE MACHINE MODES vs. STATES

Both the multiplier/filter state machine and the transmitter

state machine have 16 modes available to set the configuration

of their respective subcircuitry. The multiplier/filter state

machine has 16 states available to cycle through, whereas the

transmitter state machine has 70 available states.

Within each mode of the multiplier/filter state machine, the

user can define the following:

•

The enabled status of the RF input buffer (on or off, one bit)

•

Sleep, ready, or active state of each 4× multiplier band

(two bits for each band, six bits in total). The two bits

control the ready and active status, and if neither is high,

the multiplier band is set to sleep. Both bits must be high

to be fully active.

•

Digital step attenuator value (five bits)

•

BPF corner frequency (low or high, one bit controls the

filters in all bands)

•

Low-pass/notch filter status (on or off, one bit controls all

low-pass/notch filters)

Within each mode of the transmitter state machine, the user

can define the following:

•

Sleep, ready, or active state of each PA (two bits for each

band, eight bits in total). The two bits control the ready

and active status, and if neither is high, the PA is set to

sleep. Both bits must be high to be fully active.

•

The enabled status of the first 1:2 signal splitter feeding the

second stage of splitters (on or off, one bit)

•

The enabled status of the 1:2 signal splitter feeding PA

Channel 1 and Channel 2 (on or off, one bit)

•

The enabled status of the 1:2 signal splitter feeding PA

Channel 3 and Channel 4 (on or off, one bit)

Each multiplier/filter state is used to select a previously

configured operating mode. Each state bit field contains

four bits, allowing selection of any mode between 0 and 15

(Register 0x070 to Register 0x08F). There are 16 multiplier/filter

states available (Register 0x03C to Register 0x043). When the

multiplier/filter state machine is enabled and the sequencer

depth set in Register 0x018, Bits[3:0], the state machine cycles

through the states in order, up to the defined state machine depth.

Similarly, each transmitter state is used to select a previously

configured operating mode. Each state bit field has four bits,

allowing selection of any mode between 0 and 15 (Register 0x050

to Register 0x06F). There are 70 transmit control states available

(Register 0x019 to Register 0x03B). When the transmitter state

machine is enabled, and the sequencer depth set in Register 0x017,

the state machine cycles through the states in order, up to the

defined state machine depth.

Figure 28 shows how the state machine pointer moves through

a loop. In this diagram, n is the total number of states inside the

loop. Because the sequencer depth bit field is 0 indexed, n is

equal to one more than the value of the bits in the sequencer depth.

n = MULT_STATES + 1

where:

n = 1 to 16.

MULT_STATES is the multiplier sequencer depth.

n = TX_STATES + 1

where:

n = 1 to 16.

TX_STATES is the transmitter sequence depth.

RESET

ADVANCE

Figure 28. State Machine Position Loop

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