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ADGM1004JCPZ-R2 数据表(PDF) 26 Page - Analog Devices

部件名 ADGM1004JCPZ-R2
功能描述  0 Hz/DC to 13 GHz, 2.5 kV HBM ESD, SP4T, MEMS Switch with Integrated Driver
PDF  32 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADGM1004JCPZ-R2 数据表(HTML) 26 Page - Analog Devices

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ADGM1004
Data Sheet
Rev. D | Page 26 of 32
TYPICAL OPERATING CIRCUIT
Figure 49 shows the typical operating circuit for the ADGM1004
as used in the EVAL-ADGM1004SDZ evaluation board. A 47 pF
(100 V rated) external capacitor (CCP) is required on the VCP pin.
This capacitor is a holding capacitor for the 80 V dc gate drive
voltage.
In the circuit shown in Figure 49, VDD is connected to 3.3 V. EP1
connects to EP2 internally. Typically, one large GND pad on the
PCB is used to short together EP1 and EP2. Figure 49 shows the
ADGM1004 configured to use the internal oscillator as the
reference clock to the driver IC control circuit. Alternatively, set
the EXTD_EN pin high and apply 80 V dc directly to the VCP pin
to disable the internal oscillator and eliminate all oscillator
feedthrough. The switches can then be controlled normally via
the logic control interface, IN1 to IN4.
To avoid any floating nodes, connect a 10 MΩ shunt resistor to
GND on all RFx pins (RF1 to RF4, and RFC), as shown in
Figure 49. See the Floating Node section for more information.
GND
GND
GND
GND
RFC
24
23
22
21
20
19
18
1
2
3
4
5
6
7
8
9
10
11
12
17
16
15
14
13
IN1
IN2
IN3
IN4
GND
IN1
IN2
IN3
IN4
47pF
0.1µF
3.3V
RFOUT
RF2 IN
RF1 IN
RF4 IN
RF3 IN
10MΩ*
ADGM1004
TOP VIEW
10MΩ*
10MΩ*
*10MΩ RESISTORS ARE REQUIRED TO AVOID ANY FLOATING NODES. FOR MORE INFORMATION,
REFER TO THE FLOATING NODES SECTION.
10MΩ*
10MΩ*
Figure 49. Typical Operating Circuit



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