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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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ST7LITE3 数据表(PDF) 91 Page - STMicroelectronics |
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ST7LITE3 数据表(HTML) 91 Page - STMicroelectronics |
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91 / 167 page  ST7LITE3 91/167 LINSCI ™ SERIAL COMMUNICATION INTERFACE (SCI Mode) (Cont’d) 11.5.5 SCI Mode - Functional Description Conventional Baud Rate Generator Mode The block diagram of the Serial Control Interface in conventional baud rate generator mode is shown in Figure 54. It uses 4 registers: – Two control registers (SCICR1 and SCICR2) – A status register (SCISR) – A baud rate register (SCIBRR) Extended Prescaler Mode Two additional prescalers are available in extend- ed prescaler mode. They are shown in Figure 56. – An extended prescaler receiver register (SCIER- PR) – An extended prescaler transmitter register (SCI- ETPR) 11.5.5.1 Serial Data Format Word length may be selected as being either 8 or 9 bits by programming the M bit in the SCICR1 reg- ister (see Figure 55). The TDO pin is in low state during the start bit. The TDO pin is in high state during the stop bit. An Idle character is interpreted as a continuous logic high level for 10 (or 11) full bit times. A Break character is a character with a sufficient number of low level bits to break the normal data format followed by an extra “1” bit to acknowledge the start bit. Figure 55. Word length programming Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Bit8 Start Bit Stop Bit Next Start Bit Idle Line Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Start Bit Stop Bit Next Start Bit Start Bit Idle Line Start Bit 9-bit Word length (M bit is set) 8-bit Word length (M bit is reset) Possible Parity Bit Possible Parity Bit Break Character Start Bit Extra ’1’ Data Character Break Character Start Bit Extra ’1’ Data Character Next Data Character Next Data Character 1 |
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