ST7LITE3 datasheet(45/167 Pages) STMICROELECTRONICS

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10 I/O PORTS

10.1 INTRODUCTION

The I/O ports allow data transfer. An I/O port can

contain up to 8 pins. Each pin can be programmed

independently either as a digital input or digital

output. In addition, specific pins may have several

other functions. These functions can include exter-

nal interrupt, alternate signal input/output for on-

chip peripherals or analog input.

10.2 FUNCTIONAL DESCRIPTION

A Data Register (DR) and a Data Direction Regis-

ter (DDR) are always associated with each port.

The Option Register (OR), which allows input/out-

put options, may or may not be implemented. The

following description takes into account the OR

device specific information.

An I/O pin is programmed using the corresponding

bits in the DDR, DR and OR registers: bit x corre-

sponding to pin x of the port.

Figure 30 shows the generic I/O block diagram.

10.2.1 Input Modes

Clearing the DDRx bit selects input mode. In this

mode, reading its DR bit returns the digital value

from that I/O pin.

If an OR bit is available, different input modes can

be configured by software: floating or pull-up. Re-

fer to I/O Port Implementation section for configu-

ration.

Notes:

1. Writing to the DR modifies the latch value but

does not change the state of the input pin.

2. Do not use read/modify/write instructions

(BSET/BRES) to modify the DR register.

External Interrupt Function

Depending on the device, setting the ORx bit while

in input mode can configure an I/O as an input with

interrupt. In this configuration, a signal edge or lev-

el input on the I/O generates an interrupt request

via the corresponding interrupt vector (eix).

Falling or rising edge sensitivity is programmed in-

dependently for each interrupt vector. The Exter-

nal Interrupt Control Register (EICR) or the Miscel-

laneous Register controls this sensitivity, depend-

ing on the device.

External interrupts are hardware interrupts. Fetch-

ing the corresponding interrupt vector automatical-

ly clears the request latch. Modifying the sensitivity

bits will clear any pending interrupts.

10.2.2 Output Modes

Setting the DDRx bit selects output mode. Writing

to the DR bits applies a digital value to the I/O

through the latch. Reading the DR bits returns the

previously stored value.

If an OR bit is available, different output modes

can be selected by software: push-pull or open-

drain. Refer to I/O Port Implementation section for

configuration.

DR Value and Output Pin Status

10.2.3 Alternate Functions

Many ST7s I/Os have one or more alternate func-

tions. These may include output signals from, or

input signals to, on-chip peripherals. The Device

Pin Description table describes which peripheral

signals can be input/output to which ports.

A signal coming from an on-chip peripheral can be

output on an I/O. To do this, enable the on-chip

peripheral as an output (enable bit in the peripher-

al’s control register). The peripheral configures the

I/O as an output and takes priority over standard I/

O programming. The I/O’s state is readable by ad-

dressing the corresponding I/O data register.

Configuring an I/O as floating enables alternate

function input. It is not recommended to configure

an I/O as pull-up as this will increase current con-

sumption. Before using an I/O as an alternate in-

put, configure it without interrupt. Otherwise spuri-

ous interrupts can occur.

Configure an I/O as input floating for an on-chip

peripheral signal which can be input and output.

Caution:

I/Os which can be configured as both an analog

and digital alternate function need special atten-

tion. The user must control the peripherals so that

the signals do not arrive at the same time on the

same pin. If an external clock is used, only the

clock alternate function should be employed on

that I/O pin and not the other alternate function.

Push-Pull

Open-Drain

VOL

VOH

Floating

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