ST7LITE3 datasheet(132/167 Pages) STMICROELECTRONICS

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ST7LITE3

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OPERATING CONDITIONS (Cont’d)

The RC oscillator and PLL characteristics are temperature-dependent and are grouped in two tables.

13.3.1.1 Devices with ‘”6” order code suffix (tested for TA = -40 to +85°C) @ VDD = 4.5 to 5.5V

Notes:

1. RCCR0 is a factory-calibrated setting for 1000kHz with ±0.2 accuracy @ TA =25°C, VDD=5V. See “INTERNAL RC OS-

CILLATOR ADJUSTMENT” on page 22

2. Min value is obtained for hot temperature and max value is obtained for cold temperature.

3. Data based on characterization results, not tested in production

4. Measurement made with RC calibrated at 1MHz.

5. Guaranteed by design.

6. Averaged over a 4ms period. After the LOCKED bit is set, a period of tSTAB is required to reach ACCPLL accuracy.

7. After the LOCKED bit is set ACCPLL is max. 10% until tSTAB has elapsed. See Figure 11 on page 23.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fRC

Internal RC oscillator

frequency

RCCR = FF (reset value), TA=25°C,VDD=5V

1600

kHz

RCCR = RCCR01 ),TA=25°C,VDD=5V

995

1000

1005

ACCRC

Accuracy of Internal RC

oscillator with

RCCR=RCCR01)

TA=25°C, VDD=4.5 to 5.5V

-1

TA=-40 to +85°C, VDD=4.5 to 5.5V

-22)

+52)

TA=0 to +85°C, VDD=4.5 to 5.5V

-2

IDD(RC)

RC oscillator current con-

sumption

TA=25°C,VDD=5V

6003)4)

µA

tsu(RC)

RC oscillator setup time

TA=25°C,VDD=5V

101)

µs

fPLL

x8 PLL input clock

13)

MHz

tLOCK

PLL Lock time7)

tSTAB

PLL Stabilization time7)

ACCPLL

x8 PLL Accuracy

fRC = 1MHz@TA=25°C,VDD=4.5 to 5.5V

0.16)

fRC = 1MHz@TA=-40 to +85°C,VDD=5V

0.16)

tw(JIT)

PLL jitter period

fRC = 1MHz

85)

kHz

JITPLL

PLL jitter (

∆f

CPU/fCPU)

15)

IDD(PLL)

PLL current consumption TA=25°C

5503)

µA

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