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ADRF6604ACPZ-R7 数据表(PDF) 1 Page - Analog Devices |
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ADRF6604ACPZ-R7 数据表(HTML) 1 Page - Analog Devices |
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1 / 32 page ![]() 1200 MHz to 3600 MHz Rx Mixer with Integrated Fractional-N PLL and VCO Data Sheet ADRF6604 Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2010–2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Rx mixer with integrated fractional-N PLL RF input frequency range: 1200 MHz to 3600 MHz Internal LO frequency range: 2500 MHz to 2900 MHz Input P1dB: 14.5 dBm Input IP3: 27.5 dBm IIP3 optimization via external pin SSB noise figure IP3SET pin open: 14.3 dB IP3SET pin at 3.3 V: 15.5 dB Voltage conversion gain: 6.8 dB Matched 200 Ω IF output impedance IF 3 dB bandwidth: 500 MHz Programmable via 3-wire SPI interface 40-lead, 6 mm × 6 mm LFCSP APPLICATIONS Cellular base stations GENERAL DESCRIPTION The ADRF6604 is a high dynamic range active mixer with integrated phase-locked loop (PLL) and voltage controlled oscillator (VCO). The PLL/synthesizer uses a fractional-N PLL to generate a fLO input to the mixer. The reference input can be divided or multiplied and then applied to the PLL phase frequency detector (PFD). The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter. The loop filter output is then applied to an integrated VCO. The VCO output at 2 × fLO is applied to an LO divider, as well as to a programmable PLL divider. The programmable PLL divider is controlled by a sigma-delta (Σ-Δ) modulator (SDM). The modulus of the SDM can be programmed from 1 to 2047. The active mixer converts the single-ended, 50 Ω RF input to a differential, 200 Ω IF output. The IF output can operate up to 500 MHz. The ADRF6604 is fabricated using an advanced silicon-germanium BiCMOS process. It is available in a 40-lead, RoHS-compliant, 6 mm × 6 mm LFCSP with an exposed paddle. Performance is specified over the −40°C to +85°C temperature range. Table 1. Part No. Internal LO Range ±3 dB RFIN Balun Range ±1 dB RFIN Balun Range ADRF6601 750 MHz 300 MHz 450 MHz 1160 MHz 2500 MHz 1600 MHz ADRF6602 1550 MHz 1000 MHz 1350 MHz 2150 MHz 3100 MHz 2750 MHz ADRF6603 2100 MHz 1100 MHz 1450 MHz 2600 MHz 3200 MHz 2850 MHz ADRF6604 2500 MHz 1200 MHz 1600 MHz 2900 MHz 3600 MHz 3200 MHz FUNCTIONAL BLOCK DIAGRAM MUX RSET CP VTUNE LODRV_EN LON LOP IP3SET VCC1 2:1 MUX VCO CORE RFIN TEMP SENSOR DECLVCO DECL2P5 DECL3P3 IFP BUFFER BUFFER IFN VCC2 VCC_LO VCC_MIX VCC_V2I VCC_LO NC – + CHARGE PUMP 250µA, 500µA (DEFAULT), 750µA, 1000µA PRESCALER ÷2 LE CLK SPI INTERFACE DATA MUXOUT NC 3.3V LDO 2.5V LDO VCO LDO DIV BY 2, 1 PLL_EN REF_IN GND ADRF6604 INTERNAL LO RANGE 2500MHz TO 2900MHz 34 19 18 39 3 5 4 8 6 14 13 12 16 38 37 36 7 11 15 20 21 23 24 25 28 30 31 35 32 33 2 9 40 26 29 27 17 10 1 22 PHASE FREQUENCY DETECTOR THIRD-ORDER FRACTIONAL INTERPOLATOR FRACTION REG MODULUS INTEGER REG N COUNTER 21 TO 123 ×2 ÷2 ÷4 Figure 1. |
类似零件编号 - ADRF6604ACPZ-R7 |
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类似说明 - ADRF6604ACPZ-R7 |
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