ADRF6604ACPZ-R7 datasheet(21/32 Pages) AD

21 / 32 page

Data Sheet

ADRF6604

Rev. B | Page 21 of 32

LO SELECTION LOGIC

The downconverting mixer in the ADRF6604 can be used

without the internal PLL by applying an external differential LO

to Pin 37 (LON) and Pin 38 (LOP). In addition, when using an

LO generated by the internal PLL, the LO signal can be accessed

directly at these pins. This function can be used for debugging

purposes, or the internally generated LO can be used as the LO

for a separate mixer.

The operation of the LO generation and whether LOP and LON

are inputs or outputs are determined by the logic levels applied

at Pin 16 (PLL_EN) and Pin 36 (LODRV_EN), as well as Bit DB3

(LDRV) and Bit DB6 (PLEN) in Register 5. The combination of

externally applied logic and internal bits required for particular

LO functions is given in Table 9.

Table 9. LO Selection Logic

Pins1

Outputs

Pin 16 (PLL_EN)

Pin 36 (LODRV_EN)

Bit DB6 (PLEN)

Bit DB3 (LDRV)

Output Buffer

Disabled

External

Disabled

External

Disabled

External

Disabled

Internal

Enabled

Internal

Enabled

Internal

X = don’t care.

ADRF6604ACPZ-R7 数据表(PDF) 21 Page - Analog Devices

ADRF6604ACPZ-R7 数据表(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

数据表下载

链接网址

ADRF6604ACPZ-R7 数据表(PDF) 21 Page - Analog Devices

ADRF6604ACPZ-R7 数据表(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

数据表 下载

链接网址

数据表下载