ADRF6720ACPZ-R7 datasheet(24/44 Pages) AD

24 / 44 page

ADRF6720

Data Sheet

BASEBAND INPUTS

Drive the four I and Q inputs with an external bias level of 500 mV.

These inputs are generally dc-coupled to the outputs of a dual

DAC. The nominal drive level used in the characterization of

the ADRF6720 is 1 V p-p differential (or 500 mV p-p on each

pin).

The I and Q input resistances are 500 Ω, differential. As a result,

the external shunt resistors at the I and Q inputs may be

required to interface a DAC or a filter. The effective value of the

resistance is 500 Ω in parallel with the shunt resistor (see the

DAC to I/Q Modulator Interfacing section for more

information).

LO INPUT

The external LO input is designed to be driven differentially.

AC couple both sides of the differential LO source through a

pair of series capacitors to the LOIN+ and LOIN− pins.

The typical LO drive level, used for the characterization of the

ADRF6720, is 0 dBm.

Apply the reference frequency for the PLL (between 5.7 MHz

and 320 MHz) to the REFIN pin, which is ac-coupled. If the

REFIN pin is being driven from a 50 Ω source, terminate the

pin with 50 Ω as shown in Figure 44. Apply a drive level of

about 4 dBm to 14 dBm; 4 dBm is used at characterization.

LOOP FILTER

The loop filter in Figure 44 is connected between the CP and

VTUNE pins. The recommended components for 20 kHz filter

designs are shown in Table 8.

RF OUTPUT

The RF output is available at the RFOUT pin (Pin 24), which can

drive a 50 Ω load.

Rev. 0 | Page 24 of 44

ADRF6720ACPZ-R7 数据表(PDF) 24 Page - Analog Devices