ADRF6720ACPZ-R7 datasheet(37/44 Pages) AD

部件名	ADRF6720ACPZ-R7

功能描述	Wideband Quadrature Modulator with Integrated Fractional-N PLL and VCOs

PDF	44 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

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37 / 44 page

Data Sheet

ADRF6720

Bits

Bit Name

Settings

Description

Reset

Access

[2:0]

VCO_SEL

Select VCO Core/External LO.

0x3

000

4.6 GHz to 5.71 GHz.

001

4.02 GHz to 4.6 GHz.

010

3.5 GHz to 4.02 GHz.

011

2.85 GHz to 3.5 GHz.

100

External LO/VCO.

Address: 0x30, Reset: 0x0000, Name: BALUN_CTL

Table 24. Bit Descriptions for BALUN_CTL

Bits

Bit Name

Settings

Description

Reset

Access

[7:4]

BAL_COUT

Set Balun Output Capacitance.

0x0

0000

Minimum Capacitance Value.

1111

Maximum Capacitance Value.

[3:0]

BAL_CIN

Set Balun Input Capacitance.

0x0

0000

Minimum Capacitance Value.

1111

Maximum Capacitance Value.

Address: 0x31, Reset: 0x1101, Name: MOD_LIN_CTL

Table 25. Bit Descriptions for MOD_LIN_CTL

Bits

Bit Name

Settings

Description

Reset

Access

[12:6]

MOD_RSEL

Modulator Linearizer RSEL Value.

0x44

[5:0]

MOD_CSEL

Modulator Linearizer CSEL Value.

0x01

Rev. 0 | Page 37 of 44

ADRF6720ACPZ-R7 数据表(PDF) 37 Page - Analog Devices

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ADRF6720ACPZ-R7 数据表(PDF) 37 Page - Analog Devices

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