ADRF6720ACPZ-R7 datasheet(27/44 Pages) AD

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Data Sheet

ADRF6720

LINEARITY

The linearity in ADRF6720 can be optimized through the

MOD_RSEL (Register 0x31[12:6]) and MOD_CSEL

(Register 0x31[5:0]) settings. The resistance and capacitance

curves as a function of the MOD_RSEL and MOD_CSEL

settings. These settings control the amount of antiphase

distortion to the baseband input stages to correct for distortion.

The top two bits (Register 0x31[12:11]) of MOD_RSEL and the

MSB (Register 0x31[5]) of MOD_CSEL are used as a range

setting. Figure 52 and Figure 53 show the output IP3 and

output IP2 that are achievable across the MOD_RSEL and

MOD_CSEL settings.

Figure 52 and Figure 53 show both a surface and a contour plot in

one figure. The contour plot is located directly underneath the

surface plot. The peaks on the surface plot indicate the maximum

output IP3 and maximum output IP2, and the same color pattern

on the contour plot determines the optimized MOD_RSEL and

MOD_CSEL values. The overall shape of the output IP3 plot varies

with the MOD_RSEL setting more than the MOD_CSEL setting.

Figure 52. OIP3 vs. MOD_CSEL and MOD_RSEL at fRF = 2140 MHz, I/Q

Amplitude Per Tone = 0.5 V p-p Differential

Figure 53. OIP2 vs. MOD_CSEL and MOD_RSEL at fRF = 2140 MHz, I/Q

Amplitude per Tone = 0.5 V p-p Differential

LO AMPLITUDE AND COMMON-MODE VOLTAGE

The typical External LO driving level of the ADRF6720 is

0 dBm differential. All the baseband inputs must be externally

dc biased to 500 mV. Figure 54 and Figure 55 show the

performance variation vs. the external LO amplitude and

baseband common-mode voltage, respectively.

Figure 54. SSB Output Power, Second- and Third-Order Harmonics, Carrier

Feedthrough, Sideband Suppression, OIP2, and OIP3 vs. External LO

Amplitude; Baseband I/Q Amplitude = 1 V p-p Differential, fOUT = 2140 MHz

Figure 55. SSB Output Power, Second- and Third-Order Harmonics, Carrier

Feedthrough, Sideband Suppression, OIP2, and OIP3 vs. Baseband Common-

Mode Voltage; Baseband I/Q Amplitude = 1 V p-p Differential, fOUT = 2140 MHz

LAYOUT

Solder the exposed pad on the underside of the ADRF6720 to a

low thermal and electrical impedance ground plane. This pad is

typically soldered to an exposed opening in the solder mask on

the evaluation board. Notice the use of 25 via holes on the

exposed pad of the ADRF6720 evaluation board. Connect these

ground vias to all other ground layers on the evaluation board

to maximize heat dissipation from the device package.

MOD_RSEL

D_RS

MOD_CS

–

–70

–60

–50

–40

–30

–20

–10

–

EXTERNAL LO AMPLITUDE (dBm)

SSB OUTPUT POWER(dBm)

OUTPUT IP2 (dBm)

OUTPUT IP3 (dBm)

CARRIER FEEDTHROUGH (dBm)

THIRD HARMONIC (dBc)

SIDEBAND SUPPRESSION (dBc)

SECOND HARMONIC (dBc)

–

–70

–60

–50

–40

–30

–20

–10

0.2

0.3

0.5

0.6

0.4

0.7

0.8

BASEBAND COMMON-MODE VOLTAGE (V)

SSB OUTPUT POWER(dBm)

OUTPUT IP2 (dBm)

OUTPUT IP3 (dBm)

CARRIER FEEDTHROUGH (dBm)

SECOND HARMONIC (dBc)

SIDEBAND SUPPRESSION (dBc)

THIRD HARMONIC (dBc)

Rev. 0 | Page 27 of 44

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