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ZPSD301 数据表(PDF) 23 Page - STMicroelectronics |
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ZPSD301 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 85 page ![]() PSD3XX Family 20 CS8 / CS9 / C S10 From PAD To PAD A16/A17/A18 Latched Address Input QD En Logic Input D E M U X Address In or Chip Select Out Input or Output Set by PSDsoft 2 PSDsoft 2 Port C I/O 1 (PC0 / P C1/ P C2) ALE NOTES: 1. Port C pins can be individually configured as inputs or outputs, but not both. Pins can be individually configured as address or logic and latched or transparent, except for the 3X1 devices, which must be set to all address or all logic. 2. PSDsoft sets this configuration prior to run-time based on your PSDsoft design file. Figure 7. Port C (PC0-PC2) Pin Structure 10.4 Port C (PC0-PC2) Each pin of Port C (Figure 7) can be configured as an input to PAD A and PAD B, or as an output from PAD B. As inputs, the pins are referenced as A16-A18. Although the pins are given this reference, they can be used for any address or logic input. [For example, A8-A10 could be connected to those pins to improve the resolution (boundaries) of CS0-CS7 to 256 bytes.] How they are defined in the PSDsoft design file determines: • Whether they are address or logic inputs • Whether the input is transparent or latched by the trailing edge of ALE/AS. Notes: 1) If the inputs are addresses, they are routed to PAD A and PAD B, and can be used in any or all PAD equations. 2) A logic input is routed to PAD B and can be used for Boolean equations that are implemented in any or all of the CS0-CS10 PAD B outputs. Alternately, PC0-PC2 can become CS8-CS10 outputs, respectively, providing the user with more external chip-select PAD outputs. Each of the signals (CS8-CS10) is comprised of one product term. 10. I/O Port Functions (cont.) 10.5 ALE/AS Input Pin The ALE/AS pin may be used as a generic logic input signal to the PADs if a non-multiplexed MCU configuration is chosen in PSDsoft. |
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